From d80736ab6e8e3cad2f1a30c6eaba2d6883dbe967 Mon Sep 17 00:00:00 2001 From: Dimitri Sokolyuk Date: Sat, 26 Aug 2017 20:31:40 +0200 Subject: Remove AmForth --- amforth-6.5/avr8/devices/atmega32u6/atmega32u6.frt | 233 --- amforth-6.5/avr8/devices/atmega32u6/device.asm | 155 -- amforth-6.5/avr8/devices/atmega32u6/device.inc | 1839 -------------------- amforth-6.5/avr8/devices/atmega32u6/device.py | 183 -- 4 files changed, 2410 deletions(-) delete mode 100644 amforth-6.5/avr8/devices/atmega32u6/atmega32u6.frt delete mode 100644 amforth-6.5/avr8/devices/atmega32u6/device.asm delete mode 100644 amforth-6.5/avr8/devices/atmega32u6/device.inc delete mode 100644 amforth-6.5/avr8/devices/atmega32u6/device.py (limited to 'amforth-6.5/avr8/devices/atmega32u6') diff --git a/amforth-6.5/avr8/devices/atmega32u6/atmega32u6.frt b/amforth-6.5/avr8/devices/atmega32u6/atmega32u6.frt deleted file mode 100644 index 2040dc3..0000000 --- a/amforth-6.5/avr8/devices/atmega32u6/atmega32u6.frt +++ /dev/null @@ -1,233 +0,0 @@ -\ Partname: ATmega32U6 -\ Built using part description XML file version 1 -\ generated automatically - -hex - -\ AD_CONVERTER -79 constant ADCH \ ADC Data Register High Byte -78 constant ADCL \ ADC Data Register Low Byte -7A constant ADCSRA \ The ADC Control and Status register -7B constant ADCSRB \ ADC Control and Status Register B -7C constant ADMUX \ The ADC multiplexer Selection Register -7E constant DIDR0 \ Digital Input Disable Register 1 - -\ ANALOG_COMPARATOR -50 constant ACSR \ Analog Comparator Control And Status Register -7F constant DIDR1 \ - -\ BOOT_LOAD -57 constant SPMCSR \ Store Program Memory Control Register - -\ CPU -61 constant CLKPR \ -3E constant GPIOR0 \ General Purpose IO Register 0 -4A constant GPIOR1 \ General Purpose IO Register 1 -4B constant GPIOR2 \ General Purpose IO Register 2 -55 constant MCUCR \ MCU Control Register -54 constant MCUSR \ MCU Status Register -66 constant OSCCAL \ Oscillator Calibration Value -64 constant PRR0 \ Power Reduction Register0 -65 constant PRR1 \ Power Reduction Register1 -53 constant SMCR \ Sleep Mode Control Register -5E constant SPH \ Stack Pointer High -5D constant SPL \ Stack Pointer Low -5F constant SREG \ Status Register -74 constant XMCRA \ External Memory Control Register A -75 constant XMCRB \ External Memory Control Register B - -\ EEPROM -42 constant EEARH \ EEPROM Address Register Low Byte -41 constant EEARL \ EEPROM Address Register Low Byte -3F constant EECR \ EEPROM Control Register -40 constant EEDR \ EEPROM Data Register - -\ EXTERNAL_INTERRUPT -69 constant EICRA \ External Interrupt Control Register A -6A constant EICRB \ External Interrupt Control Register B -3C constant EIFR \ External Interrupt Flag Register -3D constant EIMSK \ External Interrupt Mask Register -68 constant PCICR \ Pin Change Interrupt Control Register -3B constant PCIFR \ Pin Change Interrupt Flag Register -6B constant PCMSK0 \ Pin Change Mask Register 0 - -\ JTAG -51 constant OCDR \ On-Chip Debug Related Register in I/O Memory - -\ PLL -49 constant PLLCSR \ PLL Status and Control register - -\ PORTA -21 constant DDRA \ Port A Data Direction Register -20 constant PINA \ Port A Input Pins -22 constant PORTA \ Port A Data Register - -\ PORTB -24 constant DDRB \ Port B Data Direction Register -23 constant PINB \ Port B Input Pins -25 constant PORTB \ Port B Data Register - -\ PORTC -27 constant DDRC \ Port C Data Direction Register -26 constant PINC \ Port C Input Pins -28 constant PORTC \ Port C Data Register - -\ PORTD -2A constant DDRD \ Port D Data Direction Register -29 constant PIND \ Port D Input Pins -2B constant PORTD \ Port D Data Register - -\ PORTE -2D constant DDRE \ Data Direction Register, Port E -2C constant PINE \ Input Pins, Port E -2E constant PORTE \ Data Register, Port E - -\ PORTF -30 constant DDRF \ Data Direction Register, Port F -2F constant PINF \ Input Pins, Port F -31 constant PORTF \ Data Register, Port F - -\ SPI -4C constant SPCR \ SPI Control Register -4E constant SPDR \ SPI Data Register -4D constant SPSR \ SPI Status Register - -\ TIMER_COUNTER_0 -43 constant GTCCR \ General Timer/Counter Control Register -47 constant OCR0A \ Timer/Counter0 Output Compare Register -48 constant OCR0B \ Timer/Counter0 Output Compare Register -44 constant TCCR0A \ Timer/Counter Control Register A -45 constant TCCR0B \ Timer/Counter Control Register B -46 constant TCNT0 \ Timer/Counter0 -35 constant TIFR0 \ Timer/Counter0 Interrupt Flag register -6E constant TIMSK0 \ Timer/Counter0 Interrupt Mask Register - -\ TIMER_COUNTER_1 -87 constant ICR1H \ Timer/Counter1 Input Capture Register High Byte -86 constant ICR1L \ Timer/Counter1 Input Capture Register Low Byte -89 constant OCR1AH \ Timer/Counter1 Output Compare Register A High Byte -88 constant OCR1AL \ Timer/Counter1 Output Compare Register A Low Byte -8B constant OCR1BH \ Timer/Counter1 Output Compare Register B High Byte -8A constant OCR1BL \ Timer/Counter1 Output Compare Register B Low Byte -8D constant OCR1CH \ Timer/Counter1 Output Compare Register C High Byte -8C constant OCR1CL \ Timer/Counter1 Output Compare Register C Low Byte -80 constant TCCR1A \ Timer/Counter1 Control Register A -81 constant TCCR1B \ Timer/Counter1 Control Register B -82 constant TCCR1C \ Timer/Counter 1 Control Register C -85 constant TCNT1H \ Timer/Counter1 High Byte -84 constant TCNT1L \ Timer/Counter1 Low Byte -36 constant TIFR1 \ Timer/Counter1 Interrupt Flag register -6F constant TIMSK1 \ Timer/Counter1 Interrupt Mask Register - -\ TIMER_COUNTER_2 -B6 constant ASSR \ Asynchronous Status Register -B3 constant OCR2A \ Timer/Counter2 Output Compare Register A -B4 constant OCR2B \ Timer/Counter2 Output Compare Register B -B0 constant TCCR2A \ Timer/Counter2 Control Register A -B1 constant TCCR2B \ Timer/Counter2 Control Register B -B2 constant TCNT2 \ Timer/Counter2 -37 constant TIFR2 \ Timer/Counter Interrupt Flag Register -70 constant TIMSK2 \ Timer/Counter Interrupt Mask register - -\ TIMER_COUNTER_3 -97 constant ICR3H \ Timer/Counter3 Input Capture Register High Byte -96 constant ICR3L \ Timer/Counter3 Input Capture Register Low Byte -99 constant OCR3AH \ Timer/Counter3 Output Compare Register A High Byte -98 constant OCR3AL \ Timer/Counter3 Output Compare Register A Low Byte -9B constant OCR3BH \ Timer/Counter3 Output Compare Register B High Byte -9A constant OCR3BL \ Timer/Counter3 Output Compare Register B Low Byte -9D constant OCR3CH \ Timer/Counter3 Output Compare Register B High Byte -9C constant OCR3CL \ Timer/Counter3 Output Compare Register B Low Byte -90 constant TCCR3A \ Timer/Counter3 Control Register A -91 constant TCCR3B \ Timer/Counter3 Control Register B -92 constant TCCR3C \ Timer/Counter 3 Control Register C -95 constant TCNT3H \ Timer/Counter3 High Byte -94 constant TCNT3L \ Timer/Counter3 Low Byte -38 constant TIFR3 \ Timer/Counter3 Interrupt Flag register -71 constant TIMSK3 \ Timer/Counter3 Interrupt Mask Register - -\ TWI -BD constant TWAMR \ TWI (Slave) Address Mask Register -BA constant TWAR \ TWI (Slave) Address register -B8 constant TWBR \ TWI Bit Rate register -BC constant TWCR \ TWI Control Register -BB constant TWDR \ TWI Data register -B9 constant TWSR \ TWI Status Register - -\ USART1 -CD constant UBRR1H \ USART Baud Rate Register High Byte -CC constant UBRR1L \ USART Baud Rate Register Low Byte -C8 constant UCSR1A \ USART Control and Status Register A -C9 constant UCSR1B \ USART Control and Status Register B -CA constant UCSR1C \ USART Control and Status Register C -CE constant UDR1 \ USART I/O Data Register - -\ USB_DEVICE -E3 constant UDADDR \ -E0 constant UDCON \ -E5 constant UDFNUMH \ -E4 constant UDFNUML \ -E2 constant UDIEN \ -E1 constant UDINT \ -E6 constant UDMFN \ -F3 constant UEBCHX \ -F2 constant UEBCLX \ -EC constant UECFG0X \ -ED constant UECFG1X \ -EB constant UECONX \ -F1 constant UEDATX \ -F0 constant UEIENX \ -F4 constant UEINT \ -E8 constant UEINTX \ -E9 constant UENUM \ -EA constant UERST \ -EE constant UESTA0X \ -EF constant UESTA1X \ - -\ USB_GLOBAL -D7 constant UHWCON \ USB Hardware Configuration Register -D8 constant USBCON \ USB General Control Register -DA constant USBINT \ -D9 constant USBSTA \ - -\ WATCHDOG -60 constant WDTCSR \ Watchdog Timer Control Register - -\ Interrupts -002 constant INT0Addr \ External Interrupt Request 0 -004 constant INT1Addr \ External Interrupt Request 1 -006 constant INT2Addr \ External Interrupt Request 2 -008 constant INT3Addr \ External Interrupt Request 3 -00A constant INT4Addr \ External Interrupt Request 4 -00C constant INT5Addr \ External Interrupt Request 5 -00E constant INT6Addr \ External Interrupt Request 6 -010 constant INT7Addr \ External Interrupt Request 7 -012 constant PCINT0Addr \ Pin Change Interrupt Request 0 -014 constant USB_GENAddr \ USB General Interrupt Request -016 constant USB_COMAddr \ USB Endpoint/Pipe Interrupt Communication Reque -018 constant WDTAddr \ Watchdog Time-out Interrupt -01A constant TIMER2_COMPAAddr \ Timer/Counter2 Compare Match A -01C constant TIMER2_COMPBAddr \ Timer/Counter2 Compare Match B -01E constant TIMER2_OVFAddr \ Timer/Counter2 Overflow -020 constant TIMER1_CAPTAddr \ Timer/Counter1 Capture Event -022 constant TIMER1_COMPAAddr \ Timer/Counter1 Compare Match A -024 constant TIMER1_COMPBAddr \ Timer/Counter1 Compare Match B -026 constant TIMER1_COMPCAddr \ Timer/Counter1 Compare Match C -028 constant TIMER1_OVFAddr \ Timer/Counter1 Overflow -02A constant TIMER0_COMPAAddr \ Timer/Counter0 Compare Match A -02C constant TIMER0_COMPBAddr \ Timer/Counter0 Compare Match B -02E constant TIMER0_OVFAddr \ Timer/Counter0 Overflow -030 constant SPI_STCAddr \ SPI Serial Transfer Complete -032 constant USART1_RXAddr \ USART1, Rx Complete -034 constant USART1_UDREAddr \ USART1 Data register Empty -036 constant USART1_TXAddr \ USART1, Tx Complete -038 constant ANALOG_COMPAddr \ Analog Comparator -03A constant ADCAddr \ ADC Conversion Complete -03C constant EE_READYAddr \ EEPROM Ready -03E constant TIMER3_CAPTAddr \ Timer/Counter3 Capture Event -040 constant TIMER3_COMPAAddr \ Timer/Counter3 Compare Match A -042 constant TIMER3_COMPBAddr \ Timer/Counter3 Compare Match B -044 constant TIMER3_COMPCAddr \ Timer/Counter3 Compare Match C -046 constant TIMER3_OVFAddr \ Timer/Counter3 Overflow -048 constant TWIAddr \ 2-wire Serial Interface -04A constant SPM_READYAddr \ Store Program Memory Read diff --git a/amforth-6.5/avr8/devices/atmega32u6/device.asm b/amforth-6.5/avr8/devices/atmega32u6/device.asm deleted file mode 100644 index 851ac95..0000000 --- a/amforth-6.5/avr8/devices/atmega32u6/device.asm +++ /dev/null @@ -1,155 +0,0 @@ -; Partname: ATmega32U6 -; Built using part description XML file version 1 -; generated automatically, do not edit - -.nolist - .include "m32U6def.inc" -.list - -.equ ramstart = $100 -.equ CELLSIZE = 2 -.macro readflashcell - lsl zl - rol zh - lpm @0, Z+ - lpm @1, Z+ -.endmacro -.macro writeflashcell - lsl zl - rol zh -.endmacro - -; the following definitions are shortcuts for the respective forth source segments if set to 1 -.set WANT_AD_CONVERTER = 0 -.set WANT_ANALOG_COMPARATOR = 0 -.set WANT_BOOT_LOAD = 0 -.set WANT_CPU = 0 -.set WANT_EEPROM = 0 -.set WANT_EXTERNAL_INTERRUPT = 0 -.set WANT_JTAG = 0 -.set WANT_PLL = 0 -.set WANT_PORTA = 0 -.set WANT_PORTB = 0 -.set WANT_PORTC = 0 -.set WANT_PORTD = 0 -.set WANT_PORTE = 0 -.set WANT_PORTF = 0 -.set WANT_SPI = 0 -.set WANT_TIMER_COUNTER_0 = 0 -.set WANT_TIMER_COUNTER_1 = 0 -.set WANT_TIMER_COUNTER_2 = 0 -.set WANT_TIMER_COUNTER_3 = 0 -.set WANT_TWI = 0 -.set WANT_USART1 = 0 -.set WANT_USB_DEVICE = 0 -.set WANT_USB_GLOBAL = 0 -.set WANT_WATCHDOG = 0 - - -.ifndef SPMEN - .equ SPMEN = SELFPRGEN -.endif - -.ifndef SPMCSR - .equ SPMCSR = SPMCR -.endif - -.ifndef EEPE - .equ EEPE = EEWE -.endif - -.ifndef EEMPE - .equ EEMPE = EEMWE -.endif -.equ intvecsize = 2 ; please verify; flash size: 32768 bytes -.equ pclen = 2 ; please verify -.overlap -.equ INTVECTORS = 38 -.org $002 - rcall isr ; External Interrupt Request 0 -.org $004 - rcall isr ; External Interrupt Request 1 -.org $006 - rcall isr ; External Interrupt Request 2 -.org $008 - rcall isr ; External Interrupt Request 3 -.org $00A - rcall isr ; External Interrupt Request 4 -.org $00C - rcall isr ; External Interrupt Request 5 -.org $00E - rcall isr ; External Interrupt Request 6 -.org $010 - rcall isr ; External Interrupt Request 7 -.org $012 - rcall isr ; Pin Change Interrupt Request 0 -.org $014 - rcall isr ; USB General Interrupt Request -.org $016 - rcall isr ; USB Endpoint/Pipe Interrupt Communication Request -.org $018 - rcall isr ; Watchdog Time-out Interrupt -.org $01A - rcall isr ; Timer/Counter2 Compare Match A -.org $01C - rcall isr ; Timer/Counter2 Compare Match B -.org $01E - rcall isr ; Timer/Counter2 Overflow -.org $020 - rcall isr ; Timer/Counter1 Capture Event -.org $022 - rcall isr ; Timer/Counter1 Compare Match A -.org $024 - rcall isr ; Timer/Counter1 Compare Match B -.org $026 - rcall isr ; Timer/Counter1 Compare Match C -.org $028 - rcall isr ; Timer/Counter1 Overflow -.org $02A - rcall isr ; Timer/Counter0 Compare Match A -.org $02C - rcall isr ; Timer/Counter0 Compare Match B -.org $02E - rcall isr ; Timer/Counter0 Overflow -.org $030 - rcall isr ; SPI Serial Transfer Complete -.org $032 - rcall isr ; USART1, Rx Complete -.org $034 - rcall isr ; USART1 Data register Empty -.org $036 - rcall isr ; USART1, Tx Complete -.org $038 - rcall isr ; Analog Comparator -.org $03A - rcall isr ; ADC Conversion Complete -.org $03C - rcall isr ; EEPROM Ready -.org $03E - rcall isr ; Timer/Counter3 Capture Event -.org $040 - rcall isr ; Timer/Counter3 Compare Match A -.org $042 - rcall isr ; Timer/Counter3 Compare Match B -.org $044 - rcall isr ; Timer/Counter3 Compare Match C -.org $046 - rcall isr ; Timer/Counter3 Overflow -.org $048 - rcall isr ; 2-wire Serial Interface -.org $04A - rcall isr ; Store Program Memory Read -.nooverlap -mcu_info: -mcu_ramsize: - .dw 2560 -mcu_eepromsize: - .dw 1024 -mcu_maxdp: - .dw 14336 ; minimum of 0x3800 (from XML) and 0xffff -mcu_numints: - .dw 38 -mcu_name: - .dw 10 - .db "ATmega32U6" -.set codestart=pc diff --git a/amforth-6.5/avr8/devices/atmega32u6/device.inc b/amforth-6.5/avr8/devices/atmega32u6/device.inc deleted file mode 100644 index 3944355..0000000 --- a/amforth-6.5/avr8/devices/atmega32u6/device.inc +++ /dev/null @@ -1,1839 +0,0 @@ -; Partname: ATmega32U6 -; Built using part description XML file version 1 -; generated automatically, no not edit - -; ******** -.if WANT_AD_CONVERTER == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; ADC Data Register High Byte -VE_ADCH: - .dw $ff04 - .db "ADCH" - .dw VE_HEAD - .set VE_HEAD=VE_ADCH -XT_ADCH: - .dw PFA_DOVARIABLE -PFA_ADCH: - .dw $79 -; ( -- addr ) System Constant -; R( -- ) -; ADC Data Register Low Byte -VE_ADCL: - .dw $ff04 - .db "ADCL" - .dw VE_HEAD - .set VE_HEAD=VE_ADCL -XT_ADCL: - .dw PFA_DOVARIABLE -PFA_ADCL: - .dw $78 -; ( -- addr ) System Constant -; R( -- ) -; The ADC Control and Status register -VE_ADCSRA: - .dw $ff06 - .db "ADCSRA" - .dw VE_HEAD - .set VE_HEAD=VE_ADCSRA -XT_ADCSRA: - .dw PFA_DOVARIABLE -PFA_ADCSRA: - .dw $7A -; ( -- addr ) System Constant -; R( -- ) -; ADC Control and Status Register B -VE_ADCSRB: - .dw $ff06 - .db "ADCSRB" - .dw VE_HEAD - .set VE_HEAD=VE_ADCSRB -XT_ADCSRB: - .dw PFA_DOVARIABLE -PFA_ADCSRB: - .dw $7B -; ( -- addr ) System Constant -; R( -- ) -; The ADC multiplexer Selection Register -VE_ADMUX: - .dw $ff05 - .db "ADMUX",0 - .dw VE_HEAD - .set VE_HEAD=VE_ADMUX -XT_ADMUX: - .dw PFA_DOVARIABLE -PFA_ADMUX: - .dw $7C -; ( -- addr ) System Constant -; R( -- ) -; Digital Input Disable Register 1 -VE_DIDR0: - .dw $ff05 - .db "DIDR0",0 - .dw VE_HEAD - .set VE_HEAD=VE_DIDR0 -XT_DIDR0: - .dw PFA_DOVARIABLE -PFA_DIDR0: - .dw $7E - -.endif - -; ******** -.if WANT_ANALOG_COMPARATOR == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Analog Comparator Control And Status Register -VE_ACSR: - .dw $ff04 - .db "ACSR" - .dw VE_HEAD - .set VE_HEAD=VE_ACSR -XT_ACSR: - .dw PFA_DOVARIABLE -PFA_ACSR: - .dw $50 -; ( -- addr ) System Constant -; R( -- ) -; -VE_DIDR1: - .dw $ff05 - .db "DIDR1",0 - .dw VE_HEAD - .set VE_HEAD=VE_DIDR1 -XT_DIDR1: - .dw PFA_DOVARIABLE -PFA_DIDR1: - .dw $7F - -.endif - -; ******** -.if WANT_BOOT_LOAD == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Store Program Memory Control Register -VE_SPMCSR: - .dw $ff06 - .db "SPMCSR" - .dw VE_HEAD - .set VE_HEAD=VE_SPMCSR -XT_SPMCSR: - .dw PFA_DOVARIABLE -PFA_SPMCSR: - .dw $57 - -.endif - -; ******** -.if WANT_CPU == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; -VE_CLKPR: - .dw $ff05 - .db "CLKPR",0 - .dw VE_HEAD - .set VE_HEAD=VE_CLKPR -XT_CLKPR: - .dw PFA_DOVARIABLE -PFA_CLKPR: - .dw $61 -; ( -- addr ) System Constant -; R( -- ) -; General Purpose IO Register 0 -VE_GPIOR0: - .dw $ff06 - .db "GPIOR0" - .dw VE_HEAD - .set VE_HEAD=VE_GPIOR0 -XT_GPIOR0: - .dw PFA_DOVARIABLE -PFA_GPIOR0: - .dw $3E -; ( -- addr ) System Constant -; R( -- ) -; General Purpose IO Register 1 -VE_GPIOR1: - .dw $ff06 - .db "GPIOR1" - .dw VE_HEAD - .set VE_HEAD=VE_GPIOR1 -XT_GPIOR1: - .dw PFA_DOVARIABLE -PFA_GPIOR1: - .dw $4A -; ( -- addr ) System Constant -; R( -- ) -; General Purpose IO Register 2 -VE_GPIOR2: - .dw $ff06 - .db "GPIOR2" - .dw VE_HEAD - .set VE_HEAD=VE_GPIOR2 -XT_GPIOR2: - .dw PFA_DOVARIABLE -PFA_GPIOR2: - .dw $4B -; ( -- addr ) System Constant -; R( -- ) -; MCU Control Register -VE_MCUCR: - .dw $ff05 - .db "MCUCR",0 - .dw VE_HEAD - .set VE_HEAD=VE_MCUCR -XT_MCUCR: - .dw PFA_DOVARIABLE -PFA_MCUCR: - .dw $55 -; ( -- addr ) System Constant -; R( -- ) -; MCU Status Register -VE_MCUSR: - .dw $ff05 - .db "MCUSR",0 - .dw VE_HEAD - .set VE_HEAD=VE_MCUSR -XT_MCUSR: - .dw PFA_DOVARIABLE -PFA_MCUSR: - .dw $54 -; ( -- addr ) System Constant -; R( -- ) -; Oscillator Calibration Value -VE_OSCCAL: - .dw $ff06 - .db "OSCCAL" - .dw VE_HEAD - .set VE_HEAD=VE_OSCCAL -XT_OSCCAL: - .dw PFA_DOVARIABLE -PFA_OSCCAL: - .dw $66 -; ( -- addr ) System Constant -; R( -- ) -; Power Reduction Register0 -VE_PRR0: - .dw $ff04 - .db "PRR0" - .dw VE_HEAD - .set VE_HEAD=VE_PRR0 -XT_PRR0: - .dw PFA_DOVARIABLE -PFA_PRR0: - .dw $64 -; ( -- addr ) System Constant -; R( -- ) -; Power Reduction Register1 -VE_PRR1: - .dw $ff04 - .db "PRR1" - .dw VE_HEAD - .set VE_HEAD=VE_PRR1 -XT_PRR1: - .dw PFA_DOVARIABLE -PFA_PRR1: - .dw $65 -; ( -- addr ) System Constant -; R( -- ) -; Sleep Mode Control Register -VE_SMCR: - .dw $ff04 - .db "SMCR" - .dw VE_HEAD - .set VE_HEAD=VE_SMCR -XT_SMCR: - .dw PFA_DOVARIABLE -PFA_SMCR: - .dw $53 -; ( -- addr ) System Constant -; R( -- ) -; Stack Pointer High -VE_SPH: - .dw $ff03 - .db "SPH",0 - .dw VE_HEAD - .set VE_HEAD=VE_SPH -XT_SPH: - .dw PFA_DOVARIABLE -PFA_SPH: - .dw $5E -; ( -- addr ) System Constant -; R( -- ) -; Stack Pointer Low -VE_SPL: - .dw $ff03 - .db "SPL",0 - .dw VE_HEAD - .set VE_HEAD=VE_SPL -XT_SPL: - .dw PFA_DOVARIABLE -PFA_SPL: - .dw $5D -; ( -- addr ) System Constant -; R( -- ) -; Status Register -VE_SREG: - .dw $ff04 - .db "SREG" - .dw VE_HEAD - .set VE_HEAD=VE_SREG -XT_SREG: - .dw PFA_DOVARIABLE -PFA_SREG: - .dw $5F -; ( -- addr ) System Constant -; R( -- ) -; External Memory Control Register A -VE_XMCRA: - .dw $ff05 - .db "XMCRA",0 - .dw VE_HEAD - .set VE_HEAD=VE_XMCRA -XT_XMCRA: - .dw PFA_DOVARIABLE -PFA_XMCRA: - .dw $74 -; ( -- addr ) System Constant -; R( -- ) -; External Memory Control Register B -VE_XMCRB: - .dw $ff05 - .db "XMCRB",0 - .dw VE_HEAD - .set VE_HEAD=VE_XMCRB -XT_XMCRB: - .dw PFA_DOVARIABLE -PFA_XMCRB: - .dw $75 - -.endif - -; ******** -.if WANT_EEPROM == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; EEPROM Address Register Low Byte -VE_EEARH: - .dw $ff05 - .db "EEARH",0 - .dw VE_HEAD - .set VE_HEAD=VE_EEARH -XT_EEARH: - .dw PFA_DOVARIABLE -PFA_EEARH: - .dw $42 -; ( -- addr ) System Constant -; R( -- ) -; EEPROM Address Register Low Byte -VE_EEARL: - .dw $ff05 - .db "EEARL",0 - .dw VE_HEAD - .set VE_HEAD=VE_EEARL -XT_EEARL: - .dw PFA_DOVARIABLE -PFA_EEARL: - .dw $41 -; ( -- addr ) System Constant -; R( -- ) -; EEPROM Control Register -VE_EECR: - .dw $ff04 - .db "EECR" - .dw VE_HEAD - .set VE_HEAD=VE_EECR -XT_EECR: - .dw PFA_DOVARIABLE -PFA_EECR: - .dw $3F -; ( -- addr ) System Constant -; R( -- ) -; EEPROM Data Register -VE_EEDR: - .dw $ff04 - .db "EEDR" - .dw VE_HEAD - .set VE_HEAD=VE_EEDR -XT_EEDR: - .dw PFA_DOVARIABLE -PFA_EEDR: - .dw $40 - -.endif - -; ******** -.if WANT_EXTERNAL_INTERRUPT == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; External Interrupt Control Register A -VE_EICRA: - .dw $ff05 - .db "EICRA",0 - .dw VE_HEAD - .set VE_HEAD=VE_EICRA -XT_EICRA: - .dw PFA_DOVARIABLE -PFA_EICRA: - .dw $69 -; ( -- addr ) System Constant -; R( -- ) -; External Interrupt Control Register B -VE_EICRB: - .dw $ff05 - .db "EICRB",0 - .dw VE_HEAD - .set VE_HEAD=VE_EICRB -XT_EICRB: - .dw PFA_DOVARIABLE -PFA_EICRB: - .dw $6A -; ( -- addr ) System Constant -; R( -- ) -; External Interrupt Flag Register -VE_EIFR: - .dw $ff04 - .db "EIFR" - .dw VE_HEAD - .set VE_HEAD=VE_EIFR -XT_EIFR: - .dw PFA_DOVARIABLE -PFA_EIFR: - .dw $3C -; ( -- addr ) System Constant -; R( -- ) -; External Interrupt Mask Register -VE_EIMSK: - .dw $ff05 - .db "EIMSK",0 - .dw VE_HEAD - .set VE_HEAD=VE_EIMSK -XT_EIMSK: - .dw PFA_DOVARIABLE -PFA_EIMSK: - .dw $3D -; ( -- addr ) System Constant -; R( -- ) -; Pin Change Interrupt Control Register -VE_PCICR: - .dw $ff05 - .db "PCICR",0 - .dw VE_HEAD - .set VE_HEAD=VE_PCICR -XT_PCICR: - .dw PFA_DOVARIABLE -PFA_PCICR: - .dw $68 -; ( -- addr ) System Constant -; R( -- ) -; Pin Change Interrupt Flag Register -VE_PCIFR: - .dw $ff05 - .db "PCIFR",0 - .dw VE_HEAD - .set VE_HEAD=VE_PCIFR -XT_PCIFR: - .dw PFA_DOVARIABLE -PFA_PCIFR: - .dw $3B -; ( -- addr ) System Constant -; R( -- ) -; Pin Change Mask Register 0 -VE_PCMSK0: - .dw $ff06 - .db "PCMSK0" - .dw VE_HEAD - .set VE_HEAD=VE_PCMSK0 -XT_PCMSK0: - .dw PFA_DOVARIABLE -PFA_PCMSK0: - .dw $6B - -.endif - -; ******** -.if WANT_JTAG == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; On-Chip Debug Related Register in I/O Memory -VE_OCDR: - .dw $ff04 - .db "OCDR" - .dw VE_HEAD - .set VE_HEAD=VE_OCDR -XT_OCDR: - .dw PFA_DOVARIABLE -PFA_OCDR: - .dw $51 - -.endif - -; ******** -.if WANT_PLL == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; PLL Status and Control register -VE_PLLCSR: - .dw $ff06 - .db "PLLCSR" - .dw VE_HEAD - .set VE_HEAD=VE_PLLCSR -XT_PLLCSR: - .dw PFA_DOVARIABLE -PFA_PLLCSR: - .dw $49 - -.endif - -; ******** -.if WANT_PORTA == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Port A Data Direction Register -VE_DDRA: - .dw $ff04 - .db "DDRA" - .dw VE_HEAD - .set VE_HEAD=VE_DDRA -XT_DDRA: - .dw PFA_DOVARIABLE -PFA_DDRA: - .dw $21 -; ( -- addr ) System Constant -; R( -- ) -; Port A Input Pins -VE_PINA: - .dw $ff04 - .db "PINA" - .dw VE_HEAD - .set VE_HEAD=VE_PINA -XT_PINA: - .dw PFA_DOVARIABLE -PFA_PINA: - .dw $20 -; ( -- addr ) System Constant -; R( -- ) -; Port A Data Register -VE_PORTA: - .dw $ff05 - .db "PORTA",0 - .dw VE_HEAD - .set VE_HEAD=VE_PORTA -XT_PORTA: - .dw PFA_DOVARIABLE -PFA_PORTA: - .dw $22 - -.endif - -; ******** -.if WANT_PORTB == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Port B Data Direction Register -VE_DDRB: - .dw $ff04 - .db "DDRB" - .dw VE_HEAD - .set VE_HEAD=VE_DDRB -XT_DDRB: - .dw PFA_DOVARIABLE -PFA_DDRB: - .dw $24 -; ( -- addr ) System Constant -; R( -- ) -; Port B Input Pins -VE_PINB: - .dw $ff04 - .db "PINB" - .dw VE_HEAD - .set VE_HEAD=VE_PINB -XT_PINB: - .dw PFA_DOVARIABLE -PFA_PINB: - .dw $23 -; ( -- addr ) System Constant -; R( -- ) -; Port B Data Register -VE_PORTB: - .dw $ff05 - .db "PORTB",0 - .dw VE_HEAD - .set VE_HEAD=VE_PORTB -XT_PORTB: - .dw PFA_DOVARIABLE -PFA_PORTB: - .dw $25 - -.endif - -; ******** -.if WANT_PORTC == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Port C Data Direction Register -VE_DDRC: - .dw $ff04 - .db "DDRC" - .dw VE_HEAD - .set VE_HEAD=VE_DDRC -XT_DDRC: - .dw PFA_DOVARIABLE -PFA_DDRC: - .dw $27 -; ( -- addr ) System Constant -; R( -- ) -; Port C Input Pins -VE_PINC: - .dw $ff04 - .db "PINC" - .dw VE_HEAD - .set VE_HEAD=VE_PINC -XT_PINC: - .dw PFA_DOVARIABLE -PFA_PINC: - .dw $26 -; ( -- addr ) System Constant -; R( -- ) -; Port C Data Register -VE_PORTC: - .dw $ff05 - .db "PORTC",0 - .dw VE_HEAD - .set VE_HEAD=VE_PORTC -XT_PORTC: - .dw PFA_DOVARIABLE -PFA_PORTC: - .dw $28 - -.endif - -; ******** -.if WANT_PORTD == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Port D Data Direction Register -VE_DDRD: - .dw $ff04 - .db "DDRD" - .dw VE_HEAD - .set VE_HEAD=VE_DDRD -XT_DDRD: - .dw PFA_DOVARIABLE -PFA_DDRD: - .dw $2A -; ( -- addr ) System Constant -; R( -- ) -; Port D Input Pins -VE_PIND: - .dw $ff04 - .db "PIND" - .dw VE_HEAD - .set VE_HEAD=VE_PIND -XT_PIND: - .dw PFA_DOVARIABLE -PFA_PIND: - .dw $29 -; ( -- addr ) System Constant -; R( -- ) -; Port D Data Register -VE_PORTD: - .dw $ff05 - .db "PORTD",0 - .dw VE_HEAD - .set VE_HEAD=VE_PORTD -XT_PORTD: - .dw PFA_DOVARIABLE -PFA_PORTD: - .dw $2B - -.endif - -; ******** -.if WANT_PORTE == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Data Direction Register, Port E -VE_DDRE: - .dw $ff04 - .db "DDRE" - .dw VE_HEAD - .set VE_HEAD=VE_DDRE -XT_DDRE: - .dw PFA_DOVARIABLE -PFA_DDRE: - .dw $2D -; ( -- addr ) System Constant -; R( -- ) -; Input Pins, Port E -VE_PINE: - .dw $ff04 - .db "PINE" - .dw VE_HEAD - .set VE_HEAD=VE_PINE -XT_PINE: - .dw PFA_DOVARIABLE -PFA_PINE: - .dw $2C -; ( -- addr ) System Constant -; R( -- ) -; Data Register, Port E -VE_PORTE: - .dw $ff05 - .db "PORTE",0 - .dw VE_HEAD - .set VE_HEAD=VE_PORTE -XT_PORTE: - .dw PFA_DOVARIABLE -PFA_PORTE: - .dw $2E - -.endif - -; ******** -.if WANT_PORTF == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Data Direction Register, Port F -VE_DDRF: - .dw $ff04 - .db "DDRF" - .dw VE_HEAD - .set VE_HEAD=VE_DDRF -XT_DDRF: - .dw PFA_DOVARIABLE -PFA_DDRF: - .dw $30 -; ( -- addr ) System Constant -; R( -- ) -; Input Pins, Port F -VE_PINF: - .dw $ff04 - .db "PINF" - .dw VE_HEAD - .set VE_HEAD=VE_PINF -XT_PINF: - .dw PFA_DOVARIABLE -PFA_PINF: - .dw $2F -; ( -- addr ) System Constant -; R( -- ) -; Data Register, Port F -VE_PORTF: - .dw $ff05 - .db "PORTF",0 - .dw VE_HEAD - .set VE_HEAD=VE_PORTF -XT_PORTF: - .dw PFA_DOVARIABLE -PFA_PORTF: - .dw $31 - -.endif - -; ******** -.if WANT_SPI == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; SPI Control Register -VE_SPCR: - .dw $ff04 - .db "SPCR" - .dw VE_HEAD - .set VE_HEAD=VE_SPCR -XT_SPCR: - .dw PFA_DOVARIABLE -PFA_SPCR: - .dw $4C -; ( -- addr ) System Constant -; R( -- ) -; SPI Data Register -VE_SPDR: - .dw $ff04 - .db "SPDR" - .dw VE_HEAD - .set VE_HEAD=VE_SPDR -XT_SPDR: - .dw PFA_DOVARIABLE -PFA_SPDR: - .dw $4E -; ( -- addr ) System Constant -; R( -- ) -; SPI Status Register -VE_SPSR: - .dw $ff04 - .db "SPSR" - .dw VE_HEAD - .set VE_HEAD=VE_SPSR -XT_SPSR: - .dw PFA_DOVARIABLE -PFA_SPSR: - .dw $4D - -.endif - -; ******** -.if WANT_TIMER_COUNTER_0 == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; General Timer/Counter Control Register -VE_GTCCR: - .dw $ff05 - .db "GTCCR",0 - .dw VE_HEAD - .set VE_HEAD=VE_GTCCR -XT_GTCCR: - .dw PFA_DOVARIABLE -PFA_GTCCR: - .dw $43 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter0 Output Compare Register -VE_OCR0A: - .dw $ff05 - .db "OCR0A",0 - .dw VE_HEAD - .set VE_HEAD=VE_OCR0A -XT_OCR0A: - .dw PFA_DOVARIABLE -PFA_OCR0A: - .dw $47 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter0 Output Compare Register -VE_OCR0B: - .dw $ff05 - .db "OCR0B",0 - .dw VE_HEAD - .set VE_HEAD=VE_OCR0B -XT_OCR0B: - .dw PFA_DOVARIABLE -PFA_OCR0B: - .dw $48 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter Control Register A -VE_TCCR0A: - .dw $ff06 - .db "TCCR0A" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR0A -XT_TCCR0A: - .dw PFA_DOVARIABLE -PFA_TCCR0A: - .dw $44 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter Control Register B -VE_TCCR0B: - .dw $ff06 - .db "TCCR0B" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR0B -XT_TCCR0B: - .dw PFA_DOVARIABLE -PFA_TCCR0B: - .dw $45 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter0 -VE_TCNT0: - .dw $ff05 - .db "TCNT0",0 - .dw VE_HEAD - .set VE_HEAD=VE_TCNT0 -XT_TCNT0: - .dw PFA_DOVARIABLE -PFA_TCNT0: - .dw $46 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter0 Interrupt Flag register -VE_TIFR0: - .dw $ff05 - .db "TIFR0",0 - .dw VE_HEAD - .set VE_HEAD=VE_TIFR0 -XT_TIFR0: - .dw PFA_DOVARIABLE -PFA_TIFR0: - .dw $35 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter0 Interrupt Mask Register -VE_TIMSK0: - .dw $ff06 - .db "TIMSK0" - .dw VE_HEAD - .set VE_HEAD=VE_TIMSK0 -XT_TIMSK0: - .dw PFA_DOVARIABLE -PFA_TIMSK0: - .dw $6E - -.endif - -; ******** -.if WANT_TIMER_COUNTER_1 == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Input Capture Register High Byte -VE_ICR1H: - .dw $ff05 - .db "ICR1H",0 - .dw VE_HEAD - .set VE_HEAD=VE_ICR1H -XT_ICR1H: - .dw PFA_DOVARIABLE -PFA_ICR1H: - .dw $87 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Input Capture Register Low Byte -VE_ICR1L: - .dw $ff05 - .db "ICR1L",0 - .dw VE_HEAD - .set VE_HEAD=VE_ICR1L -XT_ICR1L: - .dw PFA_DOVARIABLE -PFA_ICR1L: - .dw $86 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Output Compare Register A High Byte -VE_OCR1AH: - .dw $ff06 - .db "OCR1AH" - .dw VE_HEAD - .set VE_HEAD=VE_OCR1AH -XT_OCR1AH: - .dw PFA_DOVARIABLE -PFA_OCR1AH: - .dw $89 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Output Compare Register A Low Byte -VE_OCR1AL: - .dw $ff06 - .db "OCR1AL" - .dw VE_HEAD - .set VE_HEAD=VE_OCR1AL -XT_OCR1AL: - .dw PFA_DOVARIABLE -PFA_OCR1AL: - .dw $88 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Output Compare Register B High Byte -VE_OCR1BH: - .dw $ff06 - .db "OCR1BH" - .dw VE_HEAD - .set VE_HEAD=VE_OCR1BH -XT_OCR1BH: - .dw PFA_DOVARIABLE -PFA_OCR1BH: - .dw $8B -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Output Compare Register B Low Byte -VE_OCR1BL: - .dw $ff06 - .db "OCR1BL" - .dw VE_HEAD - .set VE_HEAD=VE_OCR1BL -XT_OCR1BL: - .dw PFA_DOVARIABLE -PFA_OCR1BL: - .dw $8A -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Output Compare Register C High Byte -VE_OCR1CH: - .dw $ff06 - .db "OCR1CH" - .dw VE_HEAD - .set VE_HEAD=VE_OCR1CH -XT_OCR1CH: - .dw PFA_DOVARIABLE -PFA_OCR1CH: - .dw $8D -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Output Compare Register C Low Byte -VE_OCR1CL: - .dw $ff06 - .db "OCR1CL" - .dw VE_HEAD - .set VE_HEAD=VE_OCR1CL -XT_OCR1CL: - .dw PFA_DOVARIABLE -PFA_OCR1CL: - .dw $8C -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Control Register A -VE_TCCR1A: - .dw $ff06 - .db "TCCR1A" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR1A -XT_TCCR1A: - .dw PFA_DOVARIABLE -PFA_TCCR1A: - .dw $80 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Control Register B -VE_TCCR1B: - .dw $ff06 - .db "TCCR1B" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR1B -XT_TCCR1B: - .dw PFA_DOVARIABLE -PFA_TCCR1B: - .dw $81 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter 1 Control Register C -VE_TCCR1C: - .dw $ff06 - .db "TCCR1C" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR1C -XT_TCCR1C: - .dw PFA_DOVARIABLE -PFA_TCCR1C: - .dw $82 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 High Byte -VE_TCNT1H: - .dw $ff06 - .db "TCNT1H" - .dw VE_HEAD - .set VE_HEAD=VE_TCNT1H -XT_TCNT1H: - .dw PFA_DOVARIABLE -PFA_TCNT1H: - .dw $85 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Low Byte -VE_TCNT1L: - .dw $ff06 - .db "TCNT1L" - .dw VE_HEAD - .set VE_HEAD=VE_TCNT1L -XT_TCNT1L: - .dw PFA_DOVARIABLE -PFA_TCNT1L: - .dw $84 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Interrupt Flag register -VE_TIFR1: - .dw $ff05 - .db "TIFR1",0 - .dw VE_HEAD - .set VE_HEAD=VE_TIFR1 -XT_TIFR1: - .dw PFA_DOVARIABLE -PFA_TIFR1: - .dw $36 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter1 Interrupt Mask Register -VE_TIMSK1: - .dw $ff06 - .db "TIMSK1" - .dw VE_HEAD - .set VE_HEAD=VE_TIMSK1 -XT_TIMSK1: - .dw PFA_DOVARIABLE -PFA_TIMSK1: - .dw $6F - -.endif - -; ******** -.if WANT_TIMER_COUNTER_2 == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Asynchronous Status Register -VE_ASSR: - .dw $ff04 - .db "ASSR" - .dw VE_HEAD - .set VE_HEAD=VE_ASSR -XT_ASSR: - .dw PFA_DOVARIABLE -PFA_ASSR: - .dw $B6 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter2 Output Compare Register A -VE_OCR2A: - .dw $ff05 - .db "OCR2A",0 - .dw VE_HEAD - .set VE_HEAD=VE_OCR2A -XT_OCR2A: - .dw PFA_DOVARIABLE -PFA_OCR2A: - .dw $B3 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter2 Output Compare Register B -VE_OCR2B: - .dw $ff05 - .db "OCR2B",0 - .dw VE_HEAD - .set VE_HEAD=VE_OCR2B -XT_OCR2B: - .dw PFA_DOVARIABLE -PFA_OCR2B: - .dw $B4 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter2 Control Register A -VE_TCCR2A: - .dw $ff06 - .db "TCCR2A" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR2A -XT_TCCR2A: - .dw PFA_DOVARIABLE -PFA_TCCR2A: - .dw $B0 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter2 Control Register B -VE_TCCR2B: - .dw $ff06 - .db "TCCR2B" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR2B -XT_TCCR2B: - .dw PFA_DOVARIABLE -PFA_TCCR2B: - .dw $B1 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter2 -VE_TCNT2: - .dw $ff05 - .db "TCNT2",0 - .dw VE_HEAD - .set VE_HEAD=VE_TCNT2 -XT_TCNT2: - .dw PFA_DOVARIABLE -PFA_TCNT2: - .dw $B2 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter Interrupt Flag Register -VE_TIFR2: - .dw $ff05 - .db "TIFR2",0 - .dw VE_HEAD - .set VE_HEAD=VE_TIFR2 -XT_TIFR2: - .dw PFA_DOVARIABLE -PFA_TIFR2: - .dw $37 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter Interrupt Mask register -VE_TIMSK2: - .dw $ff06 - .db "TIMSK2" - .dw VE_HEAD - .set VE_HEAD=VE_TIMSK2 -XT_TIMSK2: - .dw PFA_DOVARIABLE -PFA_TIMSK2: - .dw $70 - -.endif - -; ******** -.if WANT_TIMER_COUNTER_3 == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Input Capture Register High Byte -VE_ICR3H: - .dw $ff05 - .db "ICR3H",0 - .dw VE_HEAD - .set VE_HEAD=VE_ICR3H -XT_ICR3H: - .dw PFA_DOVARIABLE -PFA_ICR3H: - .dw $97 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Input Capture Register Low Byte -VE_ICR3L: - .dw $ff05 - .db "ICR3L",0 - .dw VE_HEAD - .set VE_HEAD=VE_ICR3L -XT_ICR3L: - .dw PFA_DOVARIABLE -PFA_ICR3L: - .dw $96 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Output Compare Register A High Byte -VE_OCR3AH: - .dw $ff06 - .db "OCR3AH" - .dw VE_HEAD - .set VE_HEAD=VE_OCR3AH -XT_OCR3AH: - .dw PFA_DOVARIABLE -PFA_OCR3AH: - .dw $99 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Output Compare Register A Low Byte -VE_OCR3AL: - .dw $ff06 - .db "OCR3AL" - .dw VE_HEAD - .set VE_HEAD=VE_OCR3AL -XT_OCR3AL: - .dw PFA_DOVARIABLE -PFA_OCR3AL: - .dw $98 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Output Compare Register B High Byte -VE_OCR3BH: - .dw $ff06 - .db "OCR3BH" - .dw VE_HEAD - .set VE_HEAD=VE_OCR3BH -XT_OCR3BH: - .dw PFA_DOVARIABLE -PFA_OCR3BH: - .dw $9B -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Output Compare Register B Low Byte -VE_OCR3BL: - .dw $ff06 - .db "OCR3BL" - .dw VE_HEAD - .set VE_HEAD=VE_OCR3BL -XT_OCR3BL: - .dw PFA_DOVARIABLE -PFA_OCR3BL: - .dw $9A -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Output Compare Register B High Byte -VE_OCR3CH: - .dw $ff06 - .db "OCR3CH" - .dw VE_HEAD - .set VE_HEAD=VE_OCR3CH -XT_OCR3CH: - .dw PFA_DOVARIABLE -PFA_OCR3CH: - .dw $9D -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Output Compare Register B Low Byte -VE_OCR3CL: - .dw $ff06 - .db "OCR3CL" - .dw VE_HEAD - .set VE_HEAD=VE_OCR3CL -XT_OCR3CL: - .dw PFA_DOVARIABLE -PFA_OCR3CL: - .dw $9C -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Control Register A -VE_TCCR3A: - .dw $ff06 - .db "TCCR3A" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR3A -XT_TCCR3A: - .dw PFA_DOVARIABLE -PFA_TCCR3A: - .dw $90 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Control Register B -VE_TCCR3B: - .dw $ff06 - .db "TCCR3B" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR3B -XT_TCCR3B: - .dw PFA_DOVARIABLE -PFA_TCCR3B: - .dw $91 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter 3 Control Register C -VE_TCCR3C: - .dw $ff06 - .db "TCCR3C" - .dw VE_HEAD - .set VE_HEAD=VE_TCCR3C -XT_TCCR3C: - .dw PFA_DOVARIABLE -PFA_TCCR3C: - .dw $92 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 High Byte -VE_TCNT3H: - .dw $ff06 - .db "TCNT3H" - .dw VE_HEAD - .set VE_HEAD=VE_TCNT3H -XT_TCNT3H: - .dw PFA_DOVARIABLE -PFA_TCNT3H: - .dw $95 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Low Byte -VE_TCNT3L: - .dw $ff06 - .db "TCNT3L" - .dw VE_HEAD - .set VE_HEAD=VE_TCNT3L -XT_TCNT3L: - .dw PFA_DOVARIABLE -PFA_TCNT3L: - .dw $94 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Interrupt Flag register -VE_TIFR3: - .dw $ff05 - .db "TIFR3",0 - .dw VE_HEAD - .set VE_HEAD=VE_TIFR3 -XT_TIFR3: - .dw PFA_DOVARIABLE -PFA_TIFR3: - .dw $38 -; ( -- addr ) System Constant -; R( -- ) -; Timer/Counter3 Interrupt Mask Register -VE_TIMSK3: - .dw $ff06 - .db "TIMSK3" - .dw VE_HEAD - .set VE_HEAD=VE_TIMSK3 -XT_TIMSK3: - .dw PFA_DOVARIABLE -PFA_TIMSK3: - .dw $71 - -.endif - -; ******** -.if WANT_TWI == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; TWI (Slave) Address Mask Register -VE_TWAMR: - .dw $ff05 - .db "TWAMR",0 - .dw VE_HEAD - .set VE_HEAD=VE_TWAMR -XT_TWAMR: - .dw PFA_DOVARIABLE -PFA_TWAMR: - .dw $BD -; ( -- addr ) System Constant -; R( -- ) -; TWI (Slave) Address register -VE_TWAR: - .dw $ff04 - .db "TWAR" - .dw VE_HEAD - .set VE_HEAD=VE_TWAR -XT_TWAR: - .dw PFA_DOVARIABLE -PFA_TWAR: - .dw $BA -; ( -- addr ) System Constant -; R( -- ) -; TWI Bit Rate register -VE_TWBR: - .dw $ff04 - .db "TWBR" - .dw VE_HEAD - .set VE_HEAD=VE_TWBR -XT_TWBR: - .dw PFA_DOVARIABLE -PFA_TWBR: - .dw $B8 -; ( -- addr ) System Constant -; R( -- ) -; TWI Control Register -VE_TWCR: - .dw $ff04 - .db "TWCR" - .dw VE_HEAD - .set VE_HEAD=VE_TWCR -XT_TWCR: - .dw PFA_DOVARIABLE -PFA_TWCR: - .dw $BC -; ( -- addr ) System Constant -; R( -- ) -; TWI Data register -VE_TWDR: - .dw $ff04 - .db "TWDR" - .dw VE_HEAD - .set VE_HEAD=VE_TWDR -XT_TWDR: - .dw PFA_DOVARIABLE -PFA_TWDR: - .dw $BB -; ( -- addr ) System Constant -; R( -- ) -; TWI Status Register -VE_TWSR: - .dw $ff04 - .db "TWSR" - .dw VE_HEAD - .set VE_HEAD=VE_TWSR -XT_TWSR: - .dw PFA_DOVARIABLE -PFA_TWSR: - .dw $B9 - -.endif - -; ******** -.if WANT_USART1 == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; USART Baud Rate Register High Byte -VE_UBRR1H: - .dw $ff06 - .db "UBRR1H" - .dw VE_HEAD - .set VE_HEAD=VE_UBRR1H -XT_UBRR1H: - .dw PFA_DOVARIABLE -PFA_UBRR1H: - .dw $CD -; ( -- addr ) System Constant -; R( -- ) -; USART Baud Rate Register Low Byte -VE_UBRR1L: - .dw $ff06 - .db "UBRR1L" - .dw VE_HEAD - .set VE_HEAD=VE_UBRR1L -XT_UBRR1L: - .dw PFA_DOVARIABLE -PFA_UBRR1L: - .dw $CC -; ( -- addr ) System Constant -; R( -- ) -; USART Control and Status Register A -VE_UCSR1A: - .dw $ff06 - .db "UCSR1A" - .dw VE_HEAD - .set VE_HEAD=VE_UCSR1A -XT_UCSR1A: - .dw PFA_DOVARIABLE -PFA_UCSR1A: - .dw $C8 -; ( -- addr ) System Constant -; R( -- ) -; USART Control and Status Register B -VE_UCSR1B: - .dw $ff06 - .db "UCSR1B" - .dw VE_HEAD - .set VE_HEAD=VE_UCSR1B -XT_UCSR1B: - .dw PFA_DOVARIABLE -PFA_UCSR1B: - .dw $C9 -; ( -- addr ) System Constant -; R( -- ) -; USART Control and Status Register C -VE_UCSR1C: - .dw $ff06 - .db "UCSR1C" - .dw VE_HEAD - .set VE_HEAD=VE_UCSR1C -XT_UCSR1C: - .dw PFA_DOVARIABLE -PFA_UCSR1C: - .dw $CA -; ( -- addr ) System Constant -; R( -- ) -; USART I/O Data Register -VE_UDR1: - .dw $ff04 - .db "UDR1" - .dw VE_HEAD - .set VE_HEAD=VE_UDR1 -XT_UDR1: - .dw PFA_DOVARIABLE -PFA_UDR1: - .dw $CE - -.endif - -; ******** -.if WANT_USB_DEVICE == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; -VE_UDADDR: - .dw $ff06 - .db "UDADDR" - .dw VE_HEAD - .set VE_HEAD=VE_UDADDR -XT_UDADDR: - .dw PFA_DOVARIABLE -PFA_UDADDR: - .dw $E3 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UDCON: - .dw $ff05 - .db "UDCON",0 - .dw VE_HEAD - .set VE_HEAD=VE_UDCON -XT_UDCON: - .dw PFA_DOVARIABLE -PFA_UDCON: - .dw $E0 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UDFNUMH: - .dw $ff07 - .db "UDFNUMH",0 - .dw VE_HEAD - .set VE_HEAD=VE_UDFNUMH -XT_UDFNUMH: - .dw PFA_DOVARIABLE -PFA_UDFNUMH: - .dw $E5 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UDFNUML: - .dw $ff07 - .db "UDFNUML",0 - .dw VE_HEAD - .set VE_HEAD=VE_UDFNUML -XT_UDFNUML: - .dw PFA_DOVARIABLE -PFA_UDFNUML: - .dw $E4 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UDIEN: - .dw $ff05 - .db "UDIEN",0 - .dw VE_HEAD - .set VE_HEAD=VE_UDIEN -XT_UDIEN: - .dw PFA_DOVARIABLE -PFA_UDIEN: - .dw $E2 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UDINT: - .dw $ff05 - .db "UDINT",0 - .dw VE_HEAD - .set VE_HEAD=VE_UDINT -XT_UDINT: - .dw PFA_DOVARIABLE -PFA_UDINT: - .dw $E1 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UDMFN: - .dw $ff05 - .db "UDMFN",0 - .dw VE_HEAD - .set VE_HEAD=VE_UDMFN -XT_UDMFN: - .dw PFA_DOVARIABLE -PFA_UDMFN: - .dw $E6 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UEBCHX: - .dw $ff06 - .db "UEBCHX" - .dw VE_HEAD - .set VE_HEAD=VE_UEBCHX -XT_UEBCHX: - .dw PFA_DOVARIABLE -PFA_UEBCHX: - .dw $F3 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UEBCLX: - .dw $ff06 - .db "UEBCLX" - .dw VE_HEAD - .set VE_HEAD=VE_UEBCLX -XT_UEBCLX: - .dw PFA_DOVARIABLE -PFA_UEBCLX: - .dw $F2 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UECFG0X: - .dw $ff07 - .db "UECFG0X",0 - .dw VE_HEAD - .set VE_HEAD=VE_UECFG0X -XT_UECFG0X: - .dw PFA_DOVARIABLE -PFA_UECFG0X: - .dw $EC -; ( -- addr ) System Constant -; R( -- ) -; -VE_UECFG1X: - .dw $ff07 - .db "UECFG1X",0 - .dw VE_HEAD - .set VE_HEAD=VE_UECFG1X -XT_UECFG1X: - .dw PFA_DOVARIABLE -PFA_UECFG1X: - .dw $ED -; ( -- addr ) System Constant -; R( -- ) -; -VE_UECONX: - .dw $ff06 - .db "UECONX" - .dw VE_HEAD - .set VE_HEAD=VE_UECONX -XT_UECONX: - .dw PFA_DOVARIABLE -PFA_UECONX: - .dw $EB -; ( -- addr ) System Constant -; R( -- ) -; -VE_UEDATX: - .dw $ff06 - .db "UEDATX" - .dw VE_HEAD - .set VE_HEAD=VE_UEDATX -XT_UEDATX: - .dw PFA_DOVARIABLE -PFA_UEDATX: - .dw $F1 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UEIENX: - .dw $ff06 - .db "UEIENX" - .dw VE_HEAD - .set VE_HEAD=VE_UEIENX -XT_UEIENX: - .dw PFA_DOVARIABLE -PFA_UEIENX: - .dw $F0 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UEINT: - .dw $ff05 - .db "UEINT",0 - .dw VE_HEAD - .set VE_HEAD=VE_UEINT -XT_UEINT: - .dw PFA_DOVARIABLE -PFA_UEINT: - .dw $F4 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UEINTX: - .dw $ff06 - .db "UEINTX" - .dw VE_HEAD - .set VE_HEAD=VE_UEINTX -XT_UEINTX: - .dw PFA_DOVARIABLE -PFA_UEINTX: - .dw $E8 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UENUM: - .dw $ff05 - .db "UENUM",0 - .dw VE_HEAD - .set VE_HEAD=VE_UENUM -XT_UENUM: - .dw PFA_DOVARIABLE -PFA_UENUM: - .dw $E9 -; ( -- addr ) System Constant -; R( -- ) -; -VE_UERST: - .dw $ff05 - .db "UERST",0 - .dw VE_HEAD - .set VE_HEAD=VE_UERST -XT_UERST: - .dw PFA_DOVARIABLE -PFA_UERST: - .dw $EA -; ( -- addr ) System Constant -; R( -- ) -; -VE_UESTA0X: - .dw $ff07 - .db "UESTA0X",0 - .dw VE_HEAD - .set VE_HEAD=VE_UESTA0X -XT_UESTA0X: - .dw PFA_DOVARIABLE -PFA_UESTA0X: - .dw $EE -; ( -- addr ) System Constant -; R( -- ) -; -VE_UESTA1X: - .dw $ff07 - .db "UESTA1X",0 - .dw VE_HEAD - .set VE_HEAD=VE_UESTA1X -XT_UESTA1X: - .dw PFA_DOVARIABLE -PFA_UESTA1X: - .dw $EF - -.endif - -; ******** -.if WANT_USB_GLOBAL == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; USB Hardware Configuration Register -VE_UHWCON: - .dw $ff06 - .db "UHWCON" - .dw VE_HEAD - .set VE_HEAD=VE_UHWCON -XT_UHWCON: - .dw PFA_DOVARIABLE -PFA_UHWCON: - .dw $D7 -; ( -- addr ) System Constant -; R( -- ) -; USB General Control Register -VE_USBCON: - .dw $ff06 - .db "USBCON" - .dw VE_HEAD - .set VE_HEAD=VE_USBCON -XT_USBCON: - .dw PFA_DOVARIABLE -PFA_USBCON: - .dw $D8 -; ( -- addr ) System Constant -; R( -- ) -; -VE_USBINT: - .dw $ff06 - .db "USBINT" - .dw VE_HEAD - .set VE_HEAD=VE_USBINT -XT_USBINT: - .dw PFA_DOVARIABLE -PFA_USBINT: - .dw $DA -; ( -- addr ) System Constant -; R( -- ) -; -VE_USBSTA: - .dw $ff06 - .db "USBSTA" - .dw VE_HEAD - .set VE_HEAD=VE_USBSTA -XT_USBSTA: - .dw PFA_DOVARIABLE -PFA_USBSTA: - .dw $D9 - -.endif - -; ******** -.if WANT_WATCHDOG == 1 -; ******** -; ( -- addr ) System Constant -; R( -- ) -; Watchdog Timer Control Register -VE_WDTCSR: - .dw $ff06 - .db "WDTCSR" - .dw VE_HEAD - .set VE_HEAD=VE_WDTCSR -XT_WDTCSR: - .dw PFA_DOVARIABLE -PFA_WDTCSR: - .dw $60 - -.endif diff --git a/amforth-6.5/avr8/devices/atmega32u6/device.py b/amforth-6.5/avr8/devices/atmega32u6/device.py deleted file mode 100644 index 7a32001..0000000 --- a/amforth-6.5/avr8/devices/atmega32u6/device.py +++ /dev/null @@ -1,183 +0,0 @@ -# Partname: ATmega32U6 -# Built using part description XML file version 1 -# generated automatically, do not edit -MCUREGS = { - 'ADCH': '$79', - 'ADCL': '$78', - 'ADCSRA': '$7A', - 'ADCSRB': '$7B', - 'ADMUX': '$7C', - 'DIDR0': '$7E', - 'ACSR': '$50', - 'DIDR1': '$7F', - 'SPMCSR': '$57', - 'CLKPR': '$61', - 'GPIOR0': '$3E', - 'GPIOR1': '$4A', - 'GPIOR2': '$4B', - 'MCUCR': '$55', - 'MCUSR': '$54', - 'OSCCAL': '$66', - 'PRR0': '$64', - 'PRR1': '$65', - 'SMCR': '$53', - 'SPH': '$5E', - 'SPL': '$5D', - 'SREG': '$5F', - 'XMCRA': '$74', - 'XMCRB': '$75', - 'EEARH': '$42', - 'EEARL': '$41', - 'EECR': '$3F', - 'EEDR': '$40', - 'EICRA': '$69', - 'EICRB': '$6A', - 'EIFR': '$3C', - 'EIMSK': '$3D', - 'PCICR': '$68', - 'PCIFR': '$3B', - 'PCMSK0': '$6B', - 'OCDR': '$51', - 'PLLCSR': '$49', - 'DDRA': '$21', - 'PINA': '$20', - 'PORTA': '$22', - 'DDRB': '$24', - 'PINB': '$23', - 'PORTB': '$25', - 'DDRC': '$27', - 'PINC': '$26', - 'PORTC': '$28', - 'DDRD': '$2A', - 'PIND': '$29', - 'PORTD': '$2B', - 'DDRE': '$2D', - 'PINE': '$2C', - 'PORTE': '$2E', - 'DDRF': '$30', - 'PINF': '$2F', - 'PORTF': '$31', - 'SPCR': '$4C', - 'SPDR': '$4E', - 'SPSR': '$4D', - 'GTCCR': '$43', - 'OCR0A': '$47', - 'OCR0B': '$48', - 'TCCR0A': '$44', - 'TCCR0B': '$45', - 'TCNT0': '$46', - 'TIFR0': '$35', - 'TIMSK0': '$6E', - 'ICR1H': '$87', - 'ICR1L': '$86', - 'OCR1AH': '$89', - 'OCR1AL': '$88', - 'OCR1BH': '$8B', - 'OCR1BL': '$8A', - 'OCR1CH': '$8D', - 'OCR1CL': '$8C', - 'TCCR1A': '$80', - 'TCCR1B': '$81', - 'TCCR1C': '$82', - 'TCNT1H': '$85', - 'TCNT1L': '$84', - 'TIFR1': '$36', - 'TIMSK1': '$6F', - 'ASSR': '$B6', - 'OCR2A': '$B3', - 'OCR2B': '$B4', - 'TCCR2A': '$B0', - 'TCCR2B': '$B1', - 'TCNT2': '$B2', - 'TIFR2': '$37', - 'TIMSK2': '$70', - 'ICR3H': '$97', - 'ICR3L': '$96', - 'OCR3AH': '$99', - 'OCR3AL': '$98', - 'OCR3BH': '$9B', - 'OCR3BL': '$9A', - 'OCR3CH': '$9D', - 'OCR3CL': '$9C', - 'TCCR3A': '$90', - 'TCCR3B': '$91', - 'TCCR3C': '$92', - 'TCNT3H': '$95', - 'TCNT3L': '$94', - 'TIFR3': '$38', - 'TIMSK3': '$71', - 'TWAMR': '$BD', - 'TWAR': '$BA', - 'TWBR': '$B8', - 'TWCR': '$BC', - 'TWDR': '$BB', - 'TWSR': '$B9', - 'UBRR1H': '$CD', - 'UBRR1L': '$CC', - 'UCSR1A': '$C8', - 'UCSR1B': '$C9', - 'UCSR1C': '$CA', - 'UDR1': '$CE', - 'UDADDR': '$E3', - 'UDCON': '$E0', - 'UDFNUMH': '$E5', - 'UDFNUML': '$E4', - 'UDIEN': '$E2', - 'UDINT': '$E1', - 'UDMFN': '$E6', - 'UEBCHX': '$F3', - 'UEBCLX': '$F2', - 'UECFG0X': '$EC', - 'UECFG1X': '$ED', - 'UECONX': '$EB', - 'UEDATX': '$F1', - 'UEIENX': '$F0', - 'UEINT': '$F4', - 'UEINTX': '$E8', - 'UENUM': '$E9', - 'UERST': '$EA', - 'UESTA0X': '$EE', - 'UESTA1X': '$EF', - 'UHWCON': '$D7', - 'USBCON': '$D8', - 'USBINT': '$DA', - 'USBSTA': '$D9', - 'WDTCSR': '$60', - 'INT0Addr': '$002', - 'INT1Addr': '$004', - 'INT2Addr': '$006', - 'INT3Addr': '$008', - 'INT4Addr': '$00A', - 'INT5Addr': '$00C', - 'INT6Addr': '$00E', - 'INT7Addr': '$010', - 'PCINT0Addr': '$012', - 'USB_GENAddr': '$014', - 'USB_COMAddr': '$016', - 'WDTAddr': '$018', - 'TIMER2_COMPAAddr': '$01A', - 'TIMER2_COMPBAddr': '$01C', - 'TIMER2_OVFAddr': '$01E', - 'TIMER1_CAPTAddr': '$020', - 'TIMER1_COMPAAddr': '$022', - 'TIMER1_COMPBAddr': '$024', - 'TIMER1_COMPCAddr': '$026', - 'TIMER1_OVFAddr': '$028', - 'TIMER0_COMPAAddr': '$02A', - 'TIMER0_COMPBAddr': '$02C', - 'TIMER0_OVFAddr': '$02E', - 'SPI_STCAddr': '$030', - 'USART1_RXAddr': '$032', - 'USART1_UDREAddr': '$034', - 'USART1_TXAddr': '$036', - 'ANALOG_COMPAddr': '$038', - 'ADCAddr': '$03A', - 'EE_READYAddr': '$03C', - 'TIMER3_CAPTAddr': '$03E', - 'TIMER3_COMPAAddr': '$040', - 'TIMER3_COMPBAddr': '$042', - 'TIMER3_COMPCAddr': '$044', - 'TIMER3_OVFAddr': '$046', - 'TWIAddr': '$048', - 'SPM_READYAddr': '$04A' -} \ No newline at end of file -- cgit v1.2.3