From 2f83a0bea9da444e3d70569eba3d6847ca02be03 Mon Sep 17 00:00:00 2001 From: Dimitri Sokolyuk Date: Fri, 21 Sep 2018 21:59:17 +0200 Subject: ... --- forth/elegoo/depth.fs | 4 ++ forth/elegoo/elegoo.fs | 23 ++++++++ forth/elegoo/fib.fs | 5 ++ forth/elegoo/flash-led.fs | 23 ++++++++ forth/elegoo/main.fs | 34 ++++++++++++ forth/elegoo/rand.fs | 17 ++++++ forth/elegoo/uno.fs | 138 ++++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 244 insertions(+) create mode 100644 forth/elegoo/depth.fs create mode 100644 forth/elegoo/elegoo.fs create mode 100644 forth/elegoo/fib.fs create mode 100644 forth/elegoo/flash-led.fs create mode 100644 forth/elegoo/main.fs create mode 100644 forth/elegoo/rand.fs create mode 100644 forth/elegoo/uno.fs (limited to 'forth/elegoo') diff --git a/forth/elegoo/depth.fs b/forth/elegoo/depth.fs new file mode 100644 index 0000000..b4bb661 --- /dev/null +++ b/forth/elegoo/depth.fs @@ -0,0 +1,4 @@ +-depth +marker -depth + +: depth s0 @ 2- sp@ - 2/ ; diff --git a/forth/elegoo/elegoo.fs b/forth/elegoo/elegoo.fs new file mode 100644 index 0000000..f6d5391 --- /dev/null +++ b/forth/elegoo/elegoo.fs @@ -0,0 +1,23 @@ +-pwm +marker -pwm + +$2a constant ddrd +$44 constant tccr0a +$45 constant tccr0b +$47 constant ocr0a +$48 constant ocr0b + +: timer0init + #01100000 ddrd mset \ output PD6 PD5 + #10100011 tccr0a c! \ mode3: non-inverted pwm A and B + #00000101 tccr0b c! \ prescale/1024 +; + +: setA ocr0a c! ; +: setB ocr0b c! ; + +: go + timer0init + $1f setA + $3f setB +; diff --git a/forth/elegoo/fib.fs b/forth/elegoo/fib.fs new file mode 100644 index 0000000..8f4cfbc --- /dev/null +++ b/forth/elegoo/fib.fs @@ -0,0 +1,5 @@ +-fib +marker fib + +: fib ( n -- fib ) + 0 1 rot 0 ?do over + swap loop drop ; diff --git a/forth/elegoo/flash-led.fs b/forth/elegoo/flash-led.fs new file mode 100644 index 0000000..08fc643 --- /dev/null +++ b/forth/elegoo/flash-led.fs @@ -0,0 +1,23 @@ +-flash-led-avr +marker -flash-led-avr +\ PB5 is Arduino digital pin 13. + +$0023 constant pinb +$0024 constant ddrb +$0025 constant portb + +$0026 constant pinc +$0027 constant ddrc +$0028 constant portc + +$0029 constant pind +$002a constant ddrd +$002b constant portd + +1 #5 lshift constant bit5 + +: init bit5 ddrb mset ; \ set pin as output +: do_output portb c@ bit5 xor portb c! ; \ toggle the bit +: main init begin do_output #500 ms again ; + +main diff --git a/forth/elegoo/main.fs b/forth/elegoo/main.fs new file mode 100644 index 0000000..bfbf81e --- /dev/null +++ b/forth/elegoo/main.fs @@ -0,0 +1,34 @@ +-io +marker -io \ define ports + +$0023 constant PB +$0023 constant pinb +$0024 constant ddrb +$0025 constant portb + +$0026 constant PC +$0026 constant pinc +$0027 constant ddrc +$0028 constant portc + +$0029 constant PD +$0029 constant pind +$002a constant ddrd +$002b constant portd + +-init +marker init + +: bv ( bit -- mask ) 1 swap lshift ; +: pin ( bit base-addr -- ) bv swap 2dup 1+ mclr ; +: port ( bit base-addr -- ) bv swap 1+ 2dup mset 1+ ; +: set ( mask addr -- ) mset ; +: clr ( mask addr -- ) mclr ; +: init + PB #3 port 2constant servo + PB #5 port 2constant led + PD #2 pin 2constant sr + PD #3 pin 2constant sc + PD #4 pin 2constant sl +; +: get ( mask addr -- bool ) c@ invert and 0= ; diff --git a/forth/elegoo/rand.fs b/forth/elegoo/rand.fs new file mode 100644 index 0000000..2bd2447 --- /dev/null +++ b/forth/elegoo/rand.fs @@ -0,0 +1,17 @@ +\ Fast Random Number Generator algorithm by George Marsaglia "Xorshift RNGs" + +-rnd +marker -rnd + +: xorshift ( n -- n ) + dup #13 lshift xor + dup #17 rshift xor + dup #5 lshift xor +; + +variable (rnd) \ seed +ticks (rnd) ! \ initialize seed + +: rnd ( -- n ) + (rnd) @ xorshift dup (rnd) ! +; diff --git a/forth/elegoo/uno.fs b/forth/elegoo/uno.fs new file mode 100644 index 0000000..bd70aa3 --- /dev/null +++ b/forth/elegoo/uno.fs @@ -0,0 +1,138 @@ +-uno +marker -uno + +\ USART0 +$c6 constant UDR0 \ USART I/O Data Register +$c0 constant UCSR0A \ USART Control and Status Register A +$c1 constant UCSR0B \ USART Control and Status Register B +$c2 constant UCSR0C \ USART Control and Status Register C +$c4 constant UBRR0 \ USART Baud Rate Register Bytes + +\ TWI +$bd constant TWAMR \ TWI (Slave) Address Mask Register +$b8 constant TWBR \ TWI Bit Rate register +$bc constant TWCR \ TWI Control Register +$b9 constant TWSR \ TWI Status Register +$bb constant TWDR \ TWI Data register +$ba constant TWAR \ TWI (Slave) Address register + +\ TIMER_COUNTER_1 +$6f constant TIMSK1 \ Timer/Counter Interrupt Mask Register +$36 constant TIFR1 \ Timer/Counter Interrupt Flag register +$80 constant TCCR1A \ Timer/Counter1 Control Register A +$81 constant TCCR1B \ Timer/Counter1 Control Register B +$82 constant TCCR1C \ Timer/Counter1 Control Register C +$84 constant TCNT1 \ Timer/Counter1 Bytes +$88 constant OCR1A \ Timer/Counter1 Output Compare Register Bytes +$8a constant OCR1B \ Timer/Counter1 Output Compare Register Bytes +$86 constant ICR1 \ Timer/Counter1 Input Capture Register Bytes +$43 constant GTCCR \ General Timer/Counter Control Register + +\ TIMER_COUNTER_2 +$70 constant TIMSK2 \ Timer/Counter Interrupt Mask register +$37 constant TIFR2 \ Timer/Counter Interrupt Flag Register +$b0 constant TCCR2A \ Timer/Counter2 Control Register A +$b1 constant TCCR2B \ Timer/Counter2 Control Register B +$b2 constant TCNT2 \ Timer/Counter2 +$b4 constant OCR2B \ Timer/Counter2 Output Compare Register B +$b3 constant OCR2A \ Timer/Counter2 Output Compare Register A +$b6 constant ASSR \ Asynchronous Status Register + +\ AD_CONVERTER +$7c constant ADMUX \ The ADC multiplexer Selection Register +$78 constant ADC \ ADC Data Register Bytes +$7a constant ADCSRA \ The ADC Control and Status register A +$7b constant ADCSRB \ The ADC Control and Status register B +$7e constant DIDR0 \ Digital Input Disable Register + +\ ANALOG_COMPARATOR +$50 constant ACSR \ Analog Comparator Control And Status Register +$7f constant DIDR1 \ Digital Input Disable Register 0x1 + +\ PORTB +$25 constant PORTB \ Port B Data Register +$24 constant DDRB \ Port B Data Direction Register +$23 constant PINB \ Port B Input Pins + +\ PORTC +$28 constant PORTC \ Port C Data Register +$27 constant DDRC \ Port C Data Direction Register +$26 constant PINC \ Port C Input Pins + +\ PORTD +$2b constant PORTD \ Port D Data Register +$2a constant DDRD \ Port D Data Direction Register +$29 constant PIND \ Port D Input Pins + +\ TIMER_COUNTER_0 +$48 constant OCR0B \ Timer/Counter0 Output Compare Register +$47 constant OCR0A \ Timer/Counter0 Output Compare Register +$46 constant TCNT0 \ Timer/Counter0 +$45 constant TCCR0B \ Timer/Counter Control Register B +$44 constant TCCR0A \ Timer/Counter Control Register A +$6e constant TIMSK0 \ Timer/Counter0 Interrupt Mask Register +$35 constant TIFR0 \ Timer/Counter0 Interrupt Flag register + +\ EXTERNAL_INTERRUPT +$69 constant EICRA \ External Interrupt Control Register +$3d constant EIMSK \ External Interrupt Mask Register +$3c constant EIFR \ External Interrupt Flag Register +$68 constant PCICR \ Pin Change Interrupt Control Register +$6d constant PCMSK2 \ Pin Change Mask Register 0x2 +$6c constant PCMSK1 \ Pin Change Mask Register 0x1 +$6b constant PCMSK0 \ Pin Change Mask Register 0x0 +$3b constant PCIFR \ Pin Change Interrupt Flag Register + +\ SPI +$4e constant SPDR \ SPI Data Register +$4d constant SPSR \ SPI Status Register +$4c constant SPCR \ SPI Control Register + +\ WATCHDOG +$60 constant WDTCSR \ Watchdog Timer Control Register + +\ CPU +$64 constant PRR \ Power Reduction Register +$66 constant OSCCAL \ Oscillator Calibration Value +$61 constant CLKPR \ Clock Prescale Register +$5F constant SREG \ Status Register +$5d constant SP \ Stack Pointer +$57 constant SPMCSR \ Store Program Memory Control and Status Register +$55 constant MCUCR \ MCU Control Register +$54 constant MCUSR \ MCU Status Register +$53 constant SMCR \ Sleep Mode Control Register +$4b constant GPIOR2 \ General Purpose I/O Register 0x2 +$4a constant GPIOR1 \ General Purpose I/O Register 0x1 +$3e constant GPIOR0 \ General Purpose I/O Register 0x0 + +\ EEPROM +$41 constant EEAR \ EEPROM Address Register Bytes +$40 constant EEDR \ EEPROM Data Register +$3f constant EECR \ EEPROM Control Register + +\ Interrupts +$02 constant INT0Addr \ External Interrupt Request 0x0 +$04 constant INT1Addr \ External Interrupt Request 0x1 +$06 constant PCINT0Addr \ Pin Change Interrupt Request 0x0 +$08 constant PCINT1Addr \ Pin Change Interrupt Request 0x0 +$0a constant PCINT2Addr \ Pin Change Interrupt Request 0x1 +$0c constant WDTAddr \ Watchdog Time-out Interrupt +$0e constant TIMER2_COMPAAddr \ Timer/Counter2 Compare Match A +$10 constant TIMER2_COMPBAddr \ Timer/Counter2 Compare Match A +$12 constant TIMER2_OVFAddr \ Timer/Counter2 Overflow +$14 constant TIMER1_CAPTAddr \ Timer/Counter1 Capture Event +$16 constant TIMER1_COMPAAddr \ Timer/Counter1 Compare Match A +$18 constant TIMER1_COMPBAddr \ Timer/Counter1 Compare Match B +$1a constant TIMER1_OVFAddr \ Timer/Counter1 Overflow +$1c constant TIMER0_COMPAAddr \ TimerCounter0 Compare Match A +$1e constant TIMER0_COMPBAddr \ TimerCounter0 Compare Match B +$20 constant TIMER0_OVFAddr \ Timer/Couner0 Overflow +$22 constant SPI_STCAddr \ SPI Serial Transfer Complete +$24 constant USART_RXAddr \ USART Rx Complete +$26 constant USART_UDREAddr \ USART, Data Register Empty +$28 constant USART_TXAddr \ USART Tx Complete +$2a constant ADCAddr \ ADC Conversion Complete +$2c constant EE_READYAddr \ EEPROM Ready +$2e constant ANALOG_COMPAddr \ Analog Comparator +$30 constant TWIAddr \ Two-wire Serial Interface +$32 constant SPM_ReadyAddr \ Store Program Memory Read -- cgit v1.2.3