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-rw-r--r--amforth-6.5/avr8/devices/atmega16hva/atmega16hva.frt140
-rw-r--r--amforth-6.5/avr8/devices/atmega16hva/device.asm114
-rw-r--r--amforth-6.5/avr8/devices/atmega16hva/device.inc1053
-rw-r--r--amforth-6.5/avr8/devices/atmega16hva/device.py274
4 files changed, 0 insertions, 1581 deletions
diff --git a/amforth-6.5/avr8/devices/atmega16hva/atmega16hva.frt b/amforth-6.5/avr8/devices/atmega16hva/atmega16hva.frt
deleted file mode 100644
index 6e3bec4..0000000
--- a/amforth-6.5/avr8/devices/atmega16hva/atmega16hva.frt
+++ /dev/null
@@ -1,140 +0,0 @@
-\ Partname: ATmega16HVA
-\ Built using part description XML file version 40
-\ generated automatically
-
-hex
-
-\ AD_CONVERTER
-79 constant VADCH \ VADC Data Register High Byte
-78 constant VADCL \ VADC Data Register Low Byte
-7A constant VADCSR \ The VADC Control and Status register
-7C constant VADMUX \ The VADC multiplexer Selection Register
-
-\ BANDGAP
-D0 constant BGCCR \ Bandgap Calibration Register
-D1 constant BGCRR \ Bandgap Calibration of Resistor Ladder
-
-\ BATTERY_PROTECTION
-F9 constant BPCHCD \ Battery Protection Charge-High-current Detection Level Register
-F7 constant BPCOCD \ Battery Protection Charge-Over-current Detection Level Register
-FD constant BPCR \ Battery Protection Control Register
-F8 constant BPDHCD \ Battery Protection Discharge-High-current Detection Level Register
-F6 constant BPDOCD \ Battery Protection Discharge-Over-current Detection Level Register
-FC constant BPHCTR \ Battery Protection Short-current Timing Register
-F3 constant BPIFR \ Battery Protection Interrupt Flag Register
-F2 constant BPIMSK \ Battery Protection Interrupt Mask Register
-FB constant BPOCTR \ Battery Protection Over-current Timing Register
-FE constant BPPLR \ Battery Protection Parameter Lock Register
-F5 constant BPSCD \ Battery Protection Short-Circuit Detection Level Register
-FA constant BPSCTR \ Battery Protection Short-current Timing Register
-
-\ BOOT_LOAD
-57 constant SPMCSR \ Store Program Memory Control and Status Register
-
-\ COULOMB_COUNTER
-E0 constant CADAC0 \ ADC Accumulate Current
-E1 constant CADAC1 \ ADC Accumulate Current
-E2 constant CADAC2 \ ADC Accumulate Current
-E3 constant CADAC3 \ ADC Accumulate Current
-E4 constant CADCSRA \ CC-ADC Control and Status Register A
-E5 constant CADCSRB \ CC-ADC Control and Status Register B
-E9 constant CADICH \ CC-ADC Instantaneous Current
-E8 constant CADICL \ CC-ADC Instantaneous Current
-E6 constant CADRC \ CC-ADC Regular Current
-
-\ CPU
-61 constant CLKPR \ Clock Prescale Register
-7E constant DIDR0 \ Digital Input Disable Register
-66 constant FOSCCAL \ Fast Oscillator Calibration Value
-3E constant GPIOR0 \ General Purpose IO Register 0
-4A constant GPIOR1 \ General Purpose IO Register 1
-4B constant GPIOR2 \ General Purpose IO Register 2
-55 constant MCUCR \ MCU Control Register
-54 constant MCUSR \ MCU Status Register
-37 constant OSICSR \ Oscillator Sampling Interface Control and Status Register
-64 constant PRR0 \ Power Reduction Register 0
-53 constant SMCR \ Sleep Mode Control Register
-5E constant SPH \ Stack Pointer High
-5D constant SPL \ Stack Pointer Low
-5F constant SREG \ Status Register
-
-\ EEPROM
-41 constant EEAR \ EEPROM Read/Write Access
-3F constant EECR \ EEPROM Control Register
-40 constant EEDR \ EEPROM Data Register
-
-\ EXTERNAL_INTERRUPT
-69 constant EICRA \ External Interrupt Control Register
-3C constant EIFR \ External Interrupt Flag Register
-3D constant EIMSK \ External Interrupt Mask Register
-
-\ FET
-F0 constant FCSR \ FET Control and Status Register
-
-\ PORTA
-21 constant DDRA \ Port A Data Direction Register
-20 constant PINA \ Port A Input Pins
-22 constant PORTA \ Port A Data Register
-
-\ PORTB
-24 constant DDRB \ Data Direction Register, Port B
-23 constant PINB \ Input Pins, Port B
-25 constant PORTB \ Data Register, Port B
-
-\ PORTC
-26 constant PINC \ Port C Input Pins
-28 constant PORTC \ Port C Data Register
-
-\ SPI
-4c constant SPCR \ SPI Control Register
-4e constant SPDR \ SPI Data Register
-4d constant SPSR \ SPI Status Register
-
-\ TIMER_COUNTER_0
-48 constant OCR0A \ Output compare Register A
-49 constant OCR0B \ Output compare Register B
-44 constant TCCR0A \ Timer/Counter0 Control Register
-45 constant TCCR0B \ Timer/Counter0 Control Register
-47 constant TCNT0H \ Timer Counter 0 High Byte
-46 constant TCNT0L \ Timer Counter 0 Low Byte
-35 constant TIFR0 \ Timer/Counter Interrupt Flag register
-6E constant TIMSK0 \ Timer/Counter Interrupt Mask Register
-
-\ TIMER_COUNTER_1
-43 constant GTCCR \ General Timer/Counter Control Register
-88 constant OCR1A \ Output Compare Register 1A
-89 constant OCR1B \ Output Compare Register B
-80 constant TCCR1A \ Timer/Counter 1 Control Register A
-81 constant TCCR1B \ Timer/Counter1 Control Register B
-85 constant TCNT1H \ Timer Counter 1 High Byte
-84 constant TCNT1L \ Timer Counter 1 Low Byte
-36 constant TIFR1 \ Timer/Counter Interrupt Flag register
-6F constant TIMSK1 \ Timer/Counter Interrupt Mask Register
-
-\ VOLTAGE_REGULATOR
-C8 constant ROCR \ Regulator Operating Condition Register
-
-\ WATCHDOG
-60 constant WDTCSR \ Watchdog Timer Control Register
-
-\ Interrupts
-0002 constant BPINTAddr \ Battery Protection Interrupt
-0004 constant VREGMONAddr \ Voltage regulator monitor interrupt
-0006 constant INT0Addr \ External Interrupt Request 0
-0008 constant INT1Addr \ External Interrupt Request 1
-000A constant INT2Addr \ External Interrupt Request 2
-000C constant WDTAddr \ Watchdog Timeout Interrupt
-000E constant TIMER1_ICAddr \ Timer 1 Input capture
-0010 constant TIMER1_COMPAAddr \ Timer 1 Compare Match A
-0012 constant TIMER1_COMPBAddr \ Timer 1 Compare Match B
-0014 constant TIMER1_OVFAddr \ Timer 1 overflow
-0016 constant TIMER0_ICAddr \ Timer 0 Input Capture
-0018 constant TIMER0_COMPAAddr \ Timer 0 Comapre Match A
-001A constant TIMER0_COMPBAddr \ Timer 0 Compare Match B
-001C constant TIMER0_OVFAddr \ Timer 0 Overflow
-001E constant SPI;STCAddr \ SPI Serial transfer complete
-0020 constant VADCAddr \ Voltage ADC Conversion Complete
-0022 constant CCADC_CONVAddr \ Coulomb Counter ADC Conversion Complete
-0024 constant CCADC_REG_CURAddr \ Coloumb Counter ADC Regular Current
-0026 constant CCADC_ACCAddr \ Coloumb Counter ADC Accumulator
-028 constant EE_READYAddr \ EEPROM Ready
diff --git a/amforth-6.5/avr8/devices/atmega16hva/device.asm b/amforth-6.5/avr8/devices/atmega16hva/device.asm
deleted file mode 100644
index 1f5b109..0000000
--- a/amforth-6.5/avr8/devices/atmega16hva/device.asm
+++ /dev/null
@@ -1,114 +0,0 @@
-; Partname: ATmega16HVA
-; Built using part description XML file version 40
-; generated automatically, do not edit
-
-.nolist
- .include "m16HVAdef.inc"
-.list
-
-.equ ramstart = $100
-.equ CELLSIZE = 2
-.macro readflashcell
- lsl zl
- rol zh
- lpm @0, Z+
- lpm @1, Z+
-.endmacro
-.macro writeflashcell
- lsl zl
- rol zh
-.endmacro
-
-; the following definitions are shortcuts for the respective forth source segments if set to 1
-.set WANT_AD_CONVERTER = 0
-.set WANT_BANDGAP = 0
-.set WANT_BATTERY_PROTECTION = 0
-.set WANT_BOOT_LOAD = 0
-.set WANT_COULOMB_COUNTER = 0
-.set WANT_CPU = 0
-.set WANT_EEPROM = 0
-.set WANT_EXTERNAL_INTERRUPT = 0
-.set WANT_FET = 0
-.set WANT_PORTA = 0
-.set WANT_PORTB = 0
-.set WANT_PORTC = 0
-.set WANT_SPI = 0
-.set WANT_TIMER_COUNTER_0 = 0
-.set WANT_TIMER_COUNTER_1 = 0
-.set WANT_VOLTAGE_REGULATOR = 0
-.set WANT_WATCHDOG = 0
-
-
-.ifndef SPMEN
- .equ SPMEN = SELFPRGEN
-.endif
-
-.ifndef SPMCSR
- .equ SPMCSR = SPMCR
-.endif
-
-.ifndef EEPE
- .equ EEPE = EEWE
-.endif
-
-.ifndef EEMPE
- .equ EEMPE = EEMWE
-.endif
-.equ intvecsize = 2 ; please verify; flash size: 16384 bytes
-.equ pclen = 2 ; please verify
-.overlap
-.equ INTVECTORS = 21
-.org $0002
- rcall isr ; Battery Protection Interrupt
-.org $0004
- rcall isr ; Voltage regulator monitor interrupt
-.org $0006
- rcall isr ; External Interrupt Request 0
-.org $0008
- rcall isr ; External Interrupt Request 1
-.org $000A
- rcall isr ; External Interrupt Request 2
-.org $000C
- rcall isr ; Watchdog Timeout Interrupt
-.org $000E
- rcall isr ; Timer 1 Input capture
-.org $0010
- rcall isr ; Timer 1 Compare Match A
-.org $0012
- rcall isr ; Timer 1 Compare Match B
-.org $0014
- rcall isr ; Timer 1 overflow
-.org $0016
- rcall isr ; Timer 0 Input Capture
-.org $0018
- rcall isr ; Timer 0 Comapre Match A
-.org $001A
- rcall isr ; Timer 0 Compare Match B
-.org $001C
- rcall isr ; Timer 0 Overflow
-.org $001E
- rcall isr ; SPI Serial transfer complete
-.org $0020
- rcall isr ; Voltage ADC Conversion Complete
-.org $0022
- rcall isr ; Coulomb Counter ADC Conversion Complete
-.org $0024
- rcall isr ; Coloumb Counter ADC Regular Current
-.org $0026
- rcall isr ; Coloumb Counter ADC Accumulator
-.org $028
- rcall isr ; EEPROM Ready
-.nooverlap
-mcu_info:
-mcu_ramsize:
- .dw 512
-mcu_eepromsize:
- .dw 256
-mcu_maxdp:
- .dw 0 ; minimum of 0 (from XML) and 0xffff
-mcu_numints:
- .dw 21
-mcu_name:
- .dw 11
- .db "ATmega16HVA",0
-.set codestart=pc
diff --git a/amforth-6.5/avr8/devices/atmega16hva/device.inc b/amforth-6.5/avr8/devices/atmega16hva/device.inc
deleted file mode 100644
index 8664a17..0000000
--- a/amforth-6.5/avr8/devices/atmega16hva/device.inc
+++ /dev/null
@@ -1,1053 +0,0 @@
-; Partname: ATmega16HVA
-; Built using part description XML file version 40
-; generated automatically, no not edit
-
-; ********
-.if WANT_AD_CONVERTER == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; VADC Data Register High Byte
-VE_VADCH:
- .dw $ff05
- .db "VADCH",0
- .dw VE_HEAD
- .set VE_HEAD=VE_VADCH
-XT_VADCH:
- .dw PFA_DOVARIABLE
-PFA_VADCH:
- .dw $79
-; ( -- addr ) System Constant
-; R( -- )
-; VADC Data Register Low Byte
-VE_VADCL:
- .dw $ff05
- .db "VADCL",0
- .dw VE_HEAD
- .set VE_HEAD=VE_VADCL
-XT_VADCL:
- .dw PFA_DOVARIABLE
-PFA_VADCL:
- .dw $78
-; ( -- addr ) System Constant
-; R( -- )
-; The VADC Control and Status register
-VE_VADCSR:
- .dw $ff06
- .db "VADCSR"
- .dw VE_HEAD
- .set VE_HEAD=VE_VADCSR
-XT_VADCSR:
- .dw PFA_DOVARIABLE
-PFA_VADCSR:
- .dw $7A
-; ( -- addr ) System Constant
-; R( -- )
-; The VADC multiplexer Selection Register
-VE_VADMUX:
- .dw $ff06
- .db "VADMUX"
- .dw VE_HEAD
- .set VE_HEAD=VE_VADMUX
-XT_VADMUX:
- .dw PFA_DOVARIABLE
-PFA_VADMUX:
- .dw $7C
-
-.endif
-
-; ********
-.if WANT_BANDGAP == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Bandgap Calibration Register
-VE_BGCCR:
- .dw $ff05
- .db "BGCCR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_BGCCR
-XT_BGCCR:
- .dw PFA_DOVARIABLE
-PFA_BGCCR:
- .dw $D0
-; ( -- addr ) System Constant
-; R( -- )
-; Bandgap Calibration of Resistor Ladder
-VE_BGCRR:
- .dw $ff05
- .db "BGCRR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_BGCRR
-XT_BGCRR:
- .dw PFA_DOVARIABLE
-PFA_BGCRR:
- .dw $D1
-
-.endif
-
-; ********
-.if WANT_BATTERY_PROTECTION == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Charge-High-current Detection Level Register
-VE_BPCHCD:
- .dw $ff06
- .db "BPCHCD"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPCHCD
-XT_BPCHCD:
- .dw PFA_DOVARIABLE
-PFA_BPCHCD:
- .dw $F9
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Charge-Over-current Detection Level Register
-VE_BPCOCD:
- .dw $ff06
- .db "BPCOCD"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPCOCD
-XT_BPCOCD:
- .dw PFA_DOVARIABLE
-PFA_BPCOCD:
- .dw $F7
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Control Register
-VE_BPCR:
- .dw $ff04
- .db "BPCR"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPCR
-XT_BPCR:
- .dw PFA_DOVARIABLE
-PFA_BPCR:
- .dw $FD
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Discharge-High-current Detection Level Register
-VE_BPDHCD:
- .dw $ff06
- .db "BPDHCD"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPDHCD
-XT_BPDHCD:
- .dw PFA_DOVARIABLE
-PFA_BPDHCD:
- .dw $F8
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Discharge-Over-current Detection Level Register
-VE_BPDOCD:
- .dw $ff06
- .db "BPDOCD"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPDOCD
-XT_BPDOCD:
- .dw PFA_DOVARIABLE
-PFA_BPDOCD:
- .dw $F6
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Short-current Timing Register
-VE_BPHCTR:
- .dw $ff06
- .db "BPHCTR"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPHCTR
-XT_BPHCTR:
- .dw PFA_DOVARIABLE
-PFA_BPHCTR:
- .dw $FC
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Interrupt Flag Register
-VE_BPIFR:
- .dw $ff05
- .db "BPIFR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_BPIFR
-XT_BPIFR:
- .dw PFA_DOVARIABLE
-PFA_BPIFR:
- .dw $F3
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Interrupt Mask Register
-VE_BPIMSK:
- .dw $ff06
- .db "BPIMSK"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPIMSK
-XT_BPIMSK:
- .dw PFA_DOVARIABLE
-PFA_BPIMSK:
- .dw $F2
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Over-current Timing Register
-VE_BPOCTR:
- .dw $ff06
- .db "BPOCTR"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPOCTR
-XT_BPOCTR:
- .dw PFA_DOVARIABLE
-PFA_BPOCTR:
- .dw $FB
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Parameter Lock Register
-VE_BPPLR:
- .dw $ff05
- .db "BPPLR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_BPPLR
-XT_BPPLR:
- .dw PFA_DOVARIABLE
-PFA_BPPLR:
- .dw $FE
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Short-Circuit Detection Level Register
-VE_BPSCD:
- .dw $ff05
- .db "BPSCD",0
- .dw VE_HEAD
- .set VE_HEAD=VE_BPSCD
-XT_BPSCD:
- .dw PFA_DOVARIABLE
-PFA_BPSCD:
- .dw $F5
-; ( -- addr ) System Constant
-; R( -- )
-; Battery Protection Short-current Timing Register
-VE_BPSCTR:
- .dw $ff06
- .db "BPSCTR"
- .dw VE_HEAD
- .set VE_HEAD=VE_BPSCTR
-XT_BPSCTR:
- .dw PFA_DOVARIABLE
-PFA_BPSCTR:
- .dw $FA
-
-.endif
-
-; ********
-.if WANT_BOOT_LOAD == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Store Program Memory Control and Status Register
-VE_SPMCSR:
- .dw $ff06
- .db "SPMCSR"
- .dw VE_HEAD
- .set VE_HEAD=VE_SPMCSR
-XT_SPMCSR:
- .dw PFA_DOVARIABLE
-PFA_SPMCSR:
- .dw $57
-
-.endif
-
-; ********
-.if WANT_COULOMB_COUNTER == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; ADC Accumulate Current
-VE_CADAC0:
- .dw $ff06
- .db "CADAC0"
- .dw VE_HEAD
- .set VE_HEAD=VE_CADAC0
-XT_CADAC0:
- .dw PFA_DOVARIABLE
-PFA_CADAC0:
- .dw $E0
-; ( -- addr ) System Constant
-; R( -- )
-; ADC Accumulate Current
-VE_CADAC1:
- .dw $ff06
- .db "CADAC1"
- .dw VE_HEAD
- .set VE_HEAD=VE_CADAC1
-XT_CADAC1:
- .dw PFA_DOVARIABLE
-PFA_CADAC1:
- .dw $E1
-; ( -- addr ) System Constant
-; R( -- )
-; ADC Accumulate Current
-VE_CADAC2:
- .dw $ff06
- .db "CADAC2"
- .dw VE_HEAD
- .set VE_HEAD=VE_CADAC2
-XT_CADAC2:
- .dw PFA_DOVARIABLE
-PFA_CADAC2:
- .dw $E2
-; ( -- addr ) System Constant
-; R( -- )
-; ADC Accumulate Current
-VE_CADAC3:
- .dw $ff06
- .db "CADAC3"
- .dw VE_HEAD
- .set VE_HEAD=VE_CADAC3
-XT_CADAC3:
- .dw PFA_DOVARIABLE
-PFA_CADAC3:
- .dw $E3
-; ( -- addr ) System Constant
-; R( -- )
-; CC-ADC Control and Status Register A
-VE_CADCSRA:
- .dw $ff07
- .db "CADCSRA",0
- .dw VE_HEAD
- .set VE_HEAD=VE_CADCSRA
-XT_CADCSRA:
- .dw PFA_DOVARIABLE
-PFA_CADCSRA:
- .dw $E4
-; ( -- addr ) System Constant
-; R( -- )
-; CC-ADC Control and Status Register B
-VE_CADCSRB:
- .dw $ff07
- .db "CADCSRB",0
- .dw VE_HEAD
- .set VE_HEAD=VE_CADCSRB
-XT_CADCSRB:
- .dw PFA_DOVARIABLE
-PFA_CADCSRB:
- .dw $E5
-; ( -- addr ) System Constant
-; R( -- )
-; CC-ADC Instantaneous Current
-VE_CADICH:
- .dw $ff06
- .db "CADICH"
- .dw VE_HEAD
- .set VE_HEAD=VE_CADICH
-XT_CADICH:
- .dw PFA_DOVARIABLE
-PFA_CADICH:
- .dw $E9
-; ( -- addr ) System Constant
-; R( -- )
-; CC-ADC Instantaneous Current
-VE_CADICL:
- .dw $ff06
- .db "CADICL"
- .dw VE_HEAD
- .set VE_HEAD=VE_CADICL
-XT_CADICL:
- .dw PFA_DOVARIABLE
-PFA_CADICL:
- .dw $E8
-; ( -- addr ) System Constant
-; R( -- )
-; CC-ADC Regular Current
-VE_CADRC:
- .dw $ff05
- .db "CADRC",0
- .dw VE_HEAD
- .set VE_HEAD=VE_CADRC
-XT_CADRC:
- .dw PFA_DOVARIABLE
-PFA_CADRC:
- .dw $E6
-
-.endif
-
-; ********
-.if WANT_CPU == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Clock Prescale Register
-VE_CLKPR:
- .dw $ff05
- .db "CLKPR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_CLKPR
-XT_CLKPR:
- .dw PFA_DOVARIABLE
-PFA_CLKPR:
- .dw $61
-; ( -- addr ) System Constant
-; R( -- )
-; Digital Input Disable Register
-VE_DIDR0:
- .dw $ff05
- .db "DIDR0",0
- .dw VE_HEAD
- .set VE_HEAD=VE_DIDR0
-XT_DIDR0:
- .dw PFA_DOVARIABLE
-PFA_DIDR0:
- .dw $7E
-; ( -- addr ) System Constant
-; R( -- )
-; Fast Oscillator Calibration Value
-VE_FOSCCAL:
- .dw $ff07
- .db "FOSCCAL",0
- .dw VE_HEAD
- .set VE_HEAD=VE_FOSCCAL
-XT_FOSCCAL:
- .dw PFA_DOVARIABLE
-PFA_FOSCCAL:
- .dw $66
-; ( -- addr ) System Constant
-; R( -- )
-; General Purpose IO Register 0
-VE_GPIOR0:
- .dw $ff06
- .db "GPIOR0"
- .dw VE_HEAD
- .set VE_HEAD=VE_GPIOR0
-XT_GPIOR0:
- .dw PFA_DOVARIABLE
-PFA_GPIOR0:
- .dw $3E
-; ( -- addr ) System Constant
-; R( -- )
-; General Purpose IO Register 1
-VE_GPIOR1:
- .dw $ff06
- .db "GPIOR1"
- .dw VE_HEAD
- .set VE_HEAD=VE_GPIOR1
-XT_GPIOR1:
- .dw PFA_DOVARIABLE
-PFA_GPIOR1:
- .dw $4A
-; ( -- addr ) System Constant
-; R( -- )
-; General Purpose IO Register 2
-VE_GPIOR2:
- .dw $ff06
- .db "GPIOR2"
- .dw VE_HEAD
- .set VE_HEAD=VE_GPIOR2
-XT_GPIOR2:
- .dw PFA_DOVARIABLE
-PFA_GPIOR2:
- .dw $4B
-; ( -- addr ) System Constant
-; R( -- )
-; MCU Control Register
-VE_MCUCR:
- .dw $ff05
- .db "MCUCR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_MCUCR
-XT_MCUCR:
- .dw PFA_DOVARIABLE
-PFA_MCUCR:
- .dw $55
-; ( -- addr ) System Constant
-; R( -- )
-; MCU Status Register
-VE_MCUSR:
- .dw $ff05
- .db "MCUSR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_MCUSR
-XT_MCUSR:
- .dw PFA_DOVARIABLE
-PFA_MCUSR:
- .dw $54
-; ( -- addr ) System Constant
-; R( -- )
-; Oscillator Sampling Interface Control and Status Register
-VE_OSICSR:
- .dw $ff06
- .db "OSICSR"
- .dw VE_HEAD
- .set VE_HEAD=VE_OSICSR
-XT_OSICSR:
- .dw PFA_DOVARIABLE
-PFA_OSICSR:
- .dw $37
-; ( -- addr ) System Constant
-; R( -- )
-; Power Reduction Register 0
-VE_PRR0:
- .dw $ff04
- .db "PRR0"
- .dw VE_HEAD
- .set VE_HEAD=VE_PRR0
-XT_PRR0:
- .dw PFA_DOVARIABLE
-PFA_PRR0:
- .dw $64
-; ( -- addr ) System Constant
-; R( -- )
-; Sleep Mode Control Register
-VE_SMCR:
- .dw $ff04
- .db "SMCR"
- .dw VE_HEAD
- .set VE_HEAD=VE_SMCR
-XT_SMCR:
- .dw PFA_DOVARIABLE
-PFA_SMCR:
- .dw $53
-; ( -- addr ) System Constant
-; R( -- )
-; Stack Pointer High
-VE_SPH:
- .dw $ff03
- .db "SPH",0
- .dw VE_HEAD
- .set VE_HEAD=VE_SPH
-XT_SPH:
- .dw PFA_DOVARIABLE
-PFA_SPH:
- .dw $5E
-; ( -- addr ) System Constant
-; R( -- )
-; Stack Pointer Low
-VE_SPL:
- .dw $ff03
- .db "SPL",0
- .dw VE_HEAD
- .set VE_HEAD=VE_SPL
-XT_SPL:
- .dw PFA_DOVARIABLE
-PFA_SPL:
- .dw $5D
-; ( -- addr ) System Constant
-; R( -- )
-; Status Register
-VE_SREG:
- .dw $ff04
- .db "SREG"
- .dw VE_HEAD
- .set VE_HEAD=VE_SREG
-XT_SREG:
- .dw PFA_DOVARIABLE
-PFA_SREG:
- .dw $5F
-
-.endif
-
-; ********
-.if WANT_EEPROM == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; EEPROM Read/Write Access
-VE_EEAR:
- .dw $ff04
- .db "EEAR"
- .dw VE_HEAD
- .set VE_HEAD=VE_EEAR
-XT_EEAR:
- .dw PFA_DOVARIABLE
-PFA_EEAR:
- .dw $41
-; ( -- addr ) System Constant
-; R( -- )
-; EEPROM Control Register
-VE_EECR:
- .dw $ff04
- .db "EECR"
- .dw VE_HEAD
- .set VE_HEAD=VE_EECR
-XT_EECR:
- .dw PFA_DOVARIABLE
-PFA_EECR:
- .dw $3F
-; ( -- addr ) System Constant
-; R( -- )
-; EEPROM Data Register
-VE_EEDR:
- .dw $ff04
- .db "EEDR"
- .dw VE_HEAD
- .set VE_HEAD=VE_EEDR
-XT_EEDR:
- .dw PFA_DOVARIABLE
-PFA_EEDR:
- .dw $40
-
-.endif
-
-; ********
-.if WANT_EXTERNAL_INTERRUPT == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; External Interrupt Control Register
-VE_EICRA:
- .dw $ff05
- .db "EICRA",0
- .dw VE_HEAD
- .set VE_HEAD=VE_EICRA
-XT_EICRA:
- .dw PFA_DOVARIABLE
-PFA_EICRA:
- .dw $69
-; ( -- addr ) System Constant
-; R( -- )
-; External Interrupt Flag Register
-VE_EIFR:
- .dw $ff04
- .db "EIFR"
- .dw VE_HEAD
- .set VE_HEAD=VE_EIFR
-XT_EIFR:
- .dw PFA_DOVARIABLE
-PFA_EIFR:
- .dw $3C
-; ( -- addr ) System Constant
-; R( -- )
-; External Interrupt Mask Register
-VE_EIMSK:
- .dw $ff05
- .db "EIMSK",0
- .dw VE_HEAD
- .set VE_HEAD=VE_EIMSK
-XT_EIMSK:
- .dw PFA_DOVARIABLE
-PFA_EIMSK:
- .dw $3D
-
-.endif
-
-; ********
-.if WANT_FET == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; FET Control and Status Register
-VE_FCSR:
- .dw $ff04
- .db "FCSR"
- .dw VE_HEAD
- .set VE_HEAD=VE_FCSR
-XT_FCSR:
- .dw PFA_DOVARIABLE
-PFA_FCSR:
- .dw $F0
-
-.endif
-
-; ********
-.if WANT_PORTA == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Port A Data Direction Register
-VE_DDRA:
- .dw $ff04
- .db "DDRA"
- .dw VE_HEAD
- .set VE_HEAD=VE_DDRA
-XT_DDRA:
- .dw PFA_DOVARIABLE
-PFA_DDRA:
- .dw $21
-; ( -- addr ) System Constant
-; R( -- )
-; Port A Input Pins
-VE_PINA:
- .dw $ff04
- .db "PINA"
- .dw VE_HEAD
- .set VE_HEAD=VE_PINA
-XT_PINA:
- .dw PFA_DOVARIABLE
-PFA_PINA:
- .dw $20
-; ( -- addr ) System Constant
-; R( -- )
-; Port A Data Register
-VE_PORTA:
- .dw $ff05
- .db "PORTA",0
- .dw VE_HEAD
- .set VE_HEAD=VE_PORTA
-XT_PORTA:
- .dw PFA_DOVARIABLE
-PFA_PORTA:
- .dw $22
-
-.endif
-
-; ********
-.if WANT_PORTB == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Data Direction Register, Port B
-VE_DDRB:
- .dw $ff04
- .db "DDRB"
- .dw VE_HEAD
- .set VE_HEAD=VE_DDRB
-XT_DDRB:
- .dw PFA_DOVARIABLE
-PFA_DDRB:
- .dw $24
-; ( -- addr ) System Constant
-; R( -- )
-; Input Pins, Port B
-VE_PINB:
- .dw $ff04
- .db "PINB"
- .dw VE_HEAD
- .set VE_HEAD=VE_PINB
-XT_PINB:
- .dw PFA_DOVARIABLE
-PFA_PINB:
- .dw $23
-; ( -- addr ) System Constant
-; R( -- )
-; Data Register, Port B
-VE_PORTB:
- .dw $ff05
- .db "PORTB",0
- .dw VE_HEAD
- .set VE_HEAD=VE_PORTB
-XT_PORTB:
- .dw PFA_DOVARIABLE
-PFA_PORTB:
- .dw $25
-
-.endif
-
-; ********
-.if WANT_PORTC == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Port C Input Pins
-VE_PINC:
- .dw $ff04
- .db "PINC"
- .dw VE_HEAD
- .set VE_HEAD=VE_PINC
-XT_PINC:
- .dw PFA_DOVARIABLE
-PFA_PINC:
- .dw $26
-; ( -- addr ) System Constant
-; R( -- )
-; Port C Data Register
-VE_PORTC:
- .dw $ff05
- .db "PORTC",0
- .dw VE_HEAD
- .set VE_HEAD=VE_PORTC
-XT_PORTC:
- .dw PFA_DOVARIABLE
-PFA_PORTC:
- .dw $28
-
-.endif
-
-; ********
-.if WANT_SPI == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; SPI Control Register
-VE_SPCR:
- .dw $ff04
- .db "SPCR"
- .dw VE_HEAD
- .set VE_HEAD=VE_SPCR
-XT_SPCR:
- .dw PFA_DOVARIABLE
-PFA_SPCR:
- .dw $4c
-; ( -- addr ) System Constant
-; R( -- )
-; SPI Data Register
-VE_SPDR:
- .dw $ff04
- .db "SPDR"
- .dw VE_HEAD
- .set VE_HEAD=VE_SPDR
-XT_SPDR:
- .dw PFA_DOVARIABLE
-PFA_SPDR:
- .dw $4e
-; ( -- addr ) System Constant
-; R( -- )
-; SPI Status Register
-VE_SPSR:
- .dw $ff04
- .db "SPSR"
- .dw VE_HEAD
- .set VE_HEAD=VE_SPSR
-XT_SPSR:
- .dw PFA_DOVARIABLE
-PFA_SPSR:
- .dw $4d
-
-.endif
-
-; ********
-.if WANT_TIMER_COUNTER_0 == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Output compare Register A
-VE_OCR0A:
- .dw $ff05
- .db "OCR0A",0
- .dw VE_HEAD
- .set VE_HEAD=VE_OCR0A
-XT_OCR0A:
- .dw PFA_DOVARIABLE
-PFA_OCR0A:
- .dw $48
-; ( -- addr ) System Constant
-; R( -- )
-; Output compare Register B
-VE_OCR0B:
- .dw $ff05
- .db "OCR0B",0
- .dw VE_HEAD
- .set VE_HEAD=VE_OCR0B
-XT_OCR0B:
- .dw PFA_DOVARIABLE
-PFA_OCR0B:
- .dw $49
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter0 Control Register
-VE_TCCR0A:
- .dw $ff06
- .db "TCCR0A"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCCR0A
-XT_TCCR0A:
- .dw PFA_DOVARIABLE
-PFA_TCCR0A:
- .dw $44
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter0 Control Register
-VE_TCCR0B:
- .dw $ff06
- .db "TCCR0B"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCCR0B
-XT_TCCR0B:
- .dw PFA_DOVARIABLE
-PFA_TCCR0B:
- .dw $45
-; ( -- addr ) System Constant
-; R( -- )
-; Timer Counter 0 High Byte
-VE_TCNT0H:
- .dw $ff06
- .db "TCNT0H"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCNT0H
-XT_TCNT0H:
- .dw PFA_DOVARIABLE
-PFA_TCNT0H:
- .dw $47
-; ( -- addr ) System Constant
-; R( -- )
-; Timer Counter 0 Low Byte
-VE_TCNT0L:
- .dw $ff06
- .db "TCNT0L"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCNT0L
-XT_TCNT0L:
- .dw PFA_DOVARIABLE
-PFA_TCNT0L:
- .dw $46
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter Interrupt Flag register
-VE_TIFR0:
- .dw $ff05
- .db "TIFR0",0
- .dw VE_HEAD
- .set VE_HEAD=VE_TIFR0
-XT_TIFR0:
- .dw PFA_DOVARIABLE
-PFA_TIFR0:
- .dw $35
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter Interrupt Mask Register
-VE_TIMSK0:
- .dw $ff06
- .db "TIMSK0"
- .dw VE_HEAD
- .set VE_HEAD=VE_TIMSK0
-XT_TIMSK0:
- .dw PFA_DOVARIABLE
-PFA_TIMSK0:
- .dw $6E
-
-.endif
-
-; ********
-.if WANT_TIMER_COUNTER_1 == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; General Timer/Counter Control Register
-VE_GTCCR:
- .dw $ff05
- .db "GTCCR",0
- .dw VE_HEAD
- .set VE_HEAD=VE_GTCCR
-XT_GTCCR:
- .dw PFA_DOVARIABLE
-PFA_GTCCR:
- .dw $43
-; ( -- addr ) System Constant
-; R( -- )
-; Output Compare Register 1A
-VE_OCR1A:
- .dw $ff05
- .db "OCR1A",0
- .dw VE_HEAD
- .set VE_HEAD=VE_OCR1A
-XT_OCR1A:
- .dw PFA_DOVARIABLE
-PFA_OCR1A:
- .dw $88
-; ( -- addr ) System Constant
-; R( -- )
-; Output Compare Register B
-VE_OCR1B:
- .dw $ff05
- .db "OCR1B",0
- .dw VE_HEAD
- .set VE_HEAD=VE_OCR1B
-XT_OCR1B:
- .dw PFA_DOVARIABLE
-PFA_OCR1B:
- .dw $89
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter 1 Control Register A
-VE_TCCR1A:
- .dw $ff06
- .db "TCCR1A"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCCR1A
-XT_TCCR1A:
- .dw PFA_DOVARIABLE
-PFA_TCCR1A:
- .dw $80
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter1 Control Register B
-VE_TCCR1B:
- .dw $ff06
- .db "TCCR1B"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCCR1B
-XT_TCCR1B:
- .dw PFA_DOVARIABLE
-PFA_TCCR1B:
- .dw $81
-; ( -- addr ) System Constant
-; R( -- )
-; Timer Counter 1 High Byte
-VE_TCNT1H:
- .dw $ff06
- .db "TCNT1H"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCNT1H
-XT_TCNT1H:
- .dw PFA_DOVARIABLE
-PFA_TCNT1H:
- .dw $85
-; ( -- addr ) System Constant
-; R( -- )
-; Timer Counter 1 Low Byte
-VE_TCNT1L:
- .dw $ff06
- .db "TCNT1L"
- .dw VE_HEAD
- .set VE_HEAD=VE_TCNT1L
-XT_TCNT1L:
- .dw PFA_DOVARIABLE
-PFA_TCNT1L:
- .dw $84
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter Interrupt Flag register
-VE_TIFR1:
- .dw $ff05
- .db "TIFR1",0
- .dw VE_HEAD
- .set VE_HEAD=VE_TIFR1
-XT_TIFR1:
- .dw PFA_DOVARIABLE
-PFA_TIFR1:
- .dw $36
-; ( -- addr ) System Constant
-; R( -- )
-; Timer/Counter Interrupt Mask Register
-VE_TIMSK1:
- .dw $ff06
- .db "TIMSK1"
- .dw VE_HEAD
- .set VE_HEAD=VE_TIMSK1
-XT_TIMSK1:
- .dw PFA_DOVARIABLE
-PFA_TIMSK1:
- .dw $6F
-
-.endif
-
-; ********
-.if WANT_VOLTAGE_REGULATOR == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Regulator Operating Condition Register
-VE_ROCR:
- .dw $ff04
- .db "ROCR"
- .dw VE_HEAD
- .set VE_HEAD=VE_ROCR
-XT_ROCR:
- .dw PFA_DOVARIABLE
-PFA_ROCR:
- .dw $C8
-
-.endif
-
-; ********
-.if WANT_WATCHDOG == 1
-; ********
-; ( -- addr ) System Constant
-; R( -- )
-; Watchdog Timer Control Register
-VE_WDTCSR:
- .dw $ff06
- .db "WDTCSR"
- .dw VE_HEAD
- .set VE_HEAD=VE_WDTCSR
-XT_WDTCSR:
- .dw PFA_DOVARIABLE
-PFA_WDTCSR:
- .dw $60
-
-.endif
diff --git a/amforth-6.5/avr8/devices/atmega16hva/device.py b/amforth-6.5/avr8/devices/atmega16hva/device.py
deleted file mode 100644
index fdbd4c4..0000000
--- a/amforth-6.5/avr8/devices/atmega16hva/device.py
+++ /dev/null
@@ -1,274 +0,0 @@
-# Generated Automatically
-
-# Partname ATmega16HVA
-
-MCUREGS = {
-# Interrupt Vectors
- 'BPINTAddr' : '#2', # Battery Protection Interrupt
- 'VREGMONAddr' : '#4', # Voltage regulator monitor interrupt
- 'INT0Addr' : '#6', # External Interrupt Request 0
- 'INT1Addr' : '#8', # External Interrupt Request 1
- 'INT2Addr' : '#10', # External Interrupt Request 2
- 'WDTAddr' : '#12', # Watchdog Timeout Interrupt
- 'TIMER1_ICAddr' : '#14', # Timer 1 Input capture
- 'TIMER1_COMPAAddr' : '#16', # Timer 1 Compare Match A
- 'TIMER1_COMPBAddr' : '#18', # Timer 1 Compare Match B
- 'TIMER1_OVFAddr' : '#20', # Timer 1 overflow
- 'TIMER0_ICAddr' : '#22', # Timer 0 Input Capture
- 'TIMER0_COMPAAddr' : '#24', # Timer 0 Comapre Match A
- 'TIMER0_COMPBAddr' : '#26', # Timer 0 Compare Match B
- 'TIMER0_OVFAddr' : '#28', # Timer 0 Overflow
- 'SPI_STCAddr' : '#30', # SPI Serial transfer complete
- 'VADCAddr' : '#32', # Voltage ADC Conversion Complete
- 'CCADC_CONVAddr' : '#34', # Coulomb Counter ADC Conversion Complete
- 'CCADC_REG_CURAddr' : '#36', # Coloumb Counter ADC Regular Current
- 'CCADC_ACCAddr' : '#38', # Coloumb Counter ADC Accumulator
- 'EE_READYAddr' : '#40', # EEPROM Ready
-
-# Module AD_CONVERTER
- 'VADMUX' : '$7c', # The VADC multiplexer Selection
- 'VADMUX_VADMUX': '$f', # Analog Channel and Gain Select
- 'VADC' : '$78', # VADC Data Register Bytes
- 'VADCSR' : '$7a', # The VADC Control and Status re
- 'VADCSR_VADEN': '$8', # VADC Enable
- 'VADCSR_VADSC': '$4', # VADC Satrt Conversion
- 'VADCSR_VADCCIF': '$2', # VADC Conversion Complete Inter
- 'VADCSR_VADCCIE': '$1', # VADC Conversion Complete Inter
-
-# Module WATCHDOG
- 'WDTCSR' : '$60', # Watchdog Timer Control Registe
- 'WDTCSR_WDIF': '$80', # Watchdog Timeout Interrupt Fla
- 'WDTCSR_WDIE': '$40', # Watchdog Timeout Interrupt Ena
- 'WDTCSR_WDP': '$27', # Watchdog Timer Prescaler Bits
- 'WDTCSR_WDCE': '$10', # Watchdog Change Enable
- 'WDTCSR_WDE': '$8', # Watch Dog Enable
-
-# Module BANDGAP
- 'BGCRR' : '$d1', # Bandgap Calibration of Resisto
- 'BGCCR' : '$d0', # Bandgap Calibration Register
- 'BGCCR_BGD': '$80', # Setting the BGD bit to one wil
- 'BGCCR_BGCC': '$3f', # BG Calibration of PTAT Current
-
-# Module EXTERNAL_INTERRUPT
- 'EICRA' : '$69', # External Interrupt Control Reg
- 'EICRA_ISC2': '$30', # External Interrupt Sense Contr
- 'EICRA_ISC1': '$c', # External Interrupt Sense Contr
- 'EICRA_ISC0': '$3', # External Interrupt Sense Contr
- 'EIMSK' : '$3d', # External Interrupt Mask Regist
- 'EIMSK_INT': '$7', # External Interrupt Request 2 E
- 'EIFR' : '$3c', # External Interrupt Flag Regist
- 'EIFR_INTF': '$7', # External Interrupt Flags
-
-# Module PORTC
- 'PORTC' : '$28', # Port C Data Register
- 'PINC' : '$26', # Port C Input Pins
-
-# Module PORTA
- 'PORTA' : '$22', # Port A Data Register
- 'DDRA' : '$21', # Port A Data Direction Register
- 'PINA' : '$20', # Port A Input Pins
-
-# Module FET
- 'FCSR' : '$f0', # FET Control and Status Registe
- 'FCSR_DUVRD': '$8', # Deep Under-Voltage Recovery Di
- 'FCSR_CPS': '$4', # Current Protection Status
- 'FCSR_DFE': '$2', # Discharge FET Enable
- 'FCSR_CFE': '$1', # Charge FET Enable
-
-# Module SPI
- 'SPCR' : '$4c', # SPI Control Register
- 'SPCR_SPIE': '$80', # SPI Interrupt Enable
- 'SPCR_SPE': '$40', # SPI Enable
- 'SPCR_DORD': '$20', # Data Order
- 'SPCR_MSTR': '$10', # Master/Slave Select
- 'SPCR_CPOL': '$8', # Clock polarity
- 'SPCR_CPHA': '$4', # Clock Phase
- 'SPCR_SPR': '$3', # SPI Clock Rate Selects
- 'SPSR' : '$4d', # SPI Status Register
- 'SPSR_SPIF': '$80', # SPI Interrupt Flag
- 'SPSR_WCOL': '$40', # Write Collision Flag
- 'SPSR_SPI2X': '$1', # Double SPI Speed Bit
- 'SPDR' : '$4e', # SPI Data Register
-
-# Module BOOT_LOAD
- 'SPMCSR' : '$57', # Store Program Memory Control a
- 'SPMCSR_SIGRD': '$20', # Signature Row Read
- 'SPMCSR_CTPB': '$10', # Clear Temporary Page Buffer
- 'SPMCSR_RFLB': '$8', # Read Fuse and Lock Bits
- 'SPMCSR_PGWRT': '$4', # Page Write
- 'SPMCSR_PGERS': '$2', # Page Erase
- 'SPMCSR_SPMEN': '$1', # Store Program Memory Enable
-
-# Module PORTB
- 'PORTB' : '$25', # Data Register, Port B
- 'DDRB' : '$24', # Data Direction Register, Port
- 'PINB' : '$23', # Input Pins, Port B
-
-# Module CPU
- 'SREG' : '$5f', # Status Register
- 'SREG_I': '$80', # Global Interrupt Enable
- 'SREG_T': '$40', # Bit Copy Storage
- 'SREG_H': '$20', # Half Carry Flag
- 'SREG_S': '$10', # Sign Bit
- 'SREG_V': '$8', # Two's Complement Overflow Flag
- 'SREG_N': '$4', # Negative Flag
- 'SREG_Z': '$2', # Zero Flag
- 'SREG_C': '$1', # Carry Flag
- 'SP' : '$5d', # Stack Pointer
- 'MCUCR' : '$55', # MCU Control Register
- 'MCUCR_CKOE': '$20', # Clock Output Enable
- 'MCUCR_PUD': '$10', # Pull-up disable
- 'MCUSR' : '$54', # MCU Status Register
- 'MCUSR_OCDRF': '$10', # OCD Reset Flag
- 'MCUSR_WDRF': '$8', # Watchdog Reset Flag
- 'MCUSR_BODRF': '$4', # Brown-out Reset Flag
- 'MCUSR_EXTRF': '$2', # External Reset Flag
- 'MCUSR_PORF': '$1', # Power-on reset flag
- 'FOSCCAL' : '$66', # Fast Oscillator Calibration Va
- 'OSICSR' : '$37', # Oscillator Sampling Interface
- 'OSICSR_OSISEL0': '$10', # Oscillator Sampling Interface
- 'OSICSR_OSIST': '$2', # Oscillator Sampling Interface
- 'OSICSR_OSIEN': '$1', # Oscillator Sampling Interface
- 'SMCR' : '$53', # Sleep Mode Control Register
- 'SMCR_SM': '$e', # Sleep Mode Select bits
- 'SMCR_SE': '$1', # Sleep Enable
- 'GPIOR2' : '$4b', # General Purpose IO Register 2
- 'GPIOR1' : '$4a', # General Purpose IO Register 1
- 'GPIOR0' : '$3e', # General Purpose IO Register 0
- 'DIDR0' : '$7e', # Digital Input Disable Register
- 'DIDR0_PA1DID': '$2', # When this bit is written logic
- 'DIDR0_PA0DID': '$1', # When this bit is written logic
- 'PRR0' : '$64', # Power Reduction Register 0
- 'PRR0_PRVRM': '$20', # Power Reduction Voltage Regula
- 'PRR0_PRSPI': '$8', # Power reduction SPI
- 'PRR0_PRTIM1': '$4', # Power Reduction Timer/Counter1
- 'PRR0_PRTIM0': '$2', # Power Reduction Timer/Counter0
- 'PRR0_PRVADC': '$1', # Power Reduction V-ADC
- 'CLKPR' : '$61', # Clock Prescale Register
- 'CLKPR_CLKPCE': '$80', # Clock Prescaler Change Enable
- 'CLKPR_CLKPS': '$3', # Clock Prescaler Select Bits
-
-# Module BATTERY_PROTECTION
- 'BPPLR' : '$fe', # Battery Protection Parameter L
- 'BPPLR_BPPLE': '$2', # Battery Protection Parameter L
- 'BPPLR_BPPL': '$1', # Battery Protection Parameter L
- 'BPCR' : '$fd', # Battery Protection Control Reg
- 'BPCR_SCD': '$10', # Short Circuit Protection Disab
- 'BPCR_DOCD': '$8', # Discharge Over-current Protect
- 'BPCR_COCD': '$4', # Charge Over-current Protection
- 'BPCR_DHCD': '$2', # Discharge High-current Protect
- 'BPCR_CHCD': '$1', # Charge High-current Protection
- 'BPHCTR' : '$fc', # Battery Protection Short-curre
- 'BPOCTR' : '$fb', # Battery Protection Over-curren
- 'BPSCTR' : '$fa', # Battery Protection Short-curre
- 'BPCHCD' : '$f9', # Battery Protection Charge-High
- 'BPDHCD' : '$f8', # Battery Protection Discharge-H
- 'BPCOCD' : '$f7', # Battery Protection Charge-Over
- 'BPDOCD' : '$f6', # Battery Protection Discharge-O
- 'BPSCD' : '$f5', # Battery Protection Short-Circu
- 'BPIFR' : '$f3', # Battery Protection Interrupt F
- 'BPIFR_SCIF': '$10', # Short-circuit Protection Activ
- 'BPIFR_DOCIF': '$8', # Discharge Over-current Protect
- 'BPIFR_COCIF': '$4', # Charge Over-current Protection
- 'BPIFR_DHCIF': '$2', # Disharge High-current Protecti
- 'BPIFR_CHCIF': '$1', # Charge High-current Protection
- 'BPIMSK' : '$f2', # Battery Protection Interrupt M
- 'BPIMSK_SCIE': '$10', # Short-circuit Protection Activ
- 'BPIMSK_DOCIE': '$8', # Discharge Over-current Protect
- 'BPIMSK_COCIE': '$4', # Charge Over-current Protection
- 'BPIMSK_DHCIE': '$2', # Discharger High-current Protec
- 'BPIMSK_CHCIE': '$1', # Charger High-current Protectio
-
-# Module EEPROM
- 'EEAR' : '$41', # EEPROM Read/Write Access
- 'EEDR' : '$40', # EEPROM Data Register
- 'EECR' : '$3f', # EEPROM Control Register
- 'EECR_EEPM': '$30', #
- 'EECR_EERIE': '$8', # EEProm Ready Interrupt Enable
- 'EECR_EEMPE': '$4', # EEPROM Master Write Enable
- 'EECR_EEPE': '$2', # EEPROM Write Enable
- 'EECR_EERE': '$1', # EEPROM Read Enable
-
-# Module TIMER_COUNTER_1
- 'TCCR1B' : '$81', # Timer/Counter1 Control Registe
- 'TCCR1B_CS': '$7', # Clock Select1 bis
- 'TCCR1A' : '$80', # Timer/Counter 1 Control Regist
- 'TCCR1A_TCW1': '$80', # Timer/Counter Width
- 'TCCR1A_ICEN1': '$40', # Input Capture Mode Enable
- 'TCCR1A_ICNC1': '$20', # Input Capture Noise Canceler
- 'TCCR1A_ICES1': '$10', # Input Capture Edge Select
- 'TCCR1A_ICS1': '$8', # Input Capture Select
- 'TCCR1A_WGM10': '$1', # Waveform Generation Mode
- 'TCNT1' : '$84', # Timer Counter 1 Bytes
- 'OCR1A' : '$88', # Output Compare Register 1A
- 'OCR1B' : '$89', # Output Compare Register B
- 'TIMSK1' : '$6f', # Timer/Counter Interrupt Mask R
- 'TIMSK1_ICIE1': '$8', # Timer/Counter n Input Capture
- 'TIMSK1_OCIE1B': '$4', # Timer/Counter1 Output Compare
- 'TIMSK1_OCIE1A': '$2', # Timer/Counter1 Output Compare
- 'TIMSK1_TOIE1': '$1', # Timer/Counter1 Overflow Interr
- 'TIFR1' : '$36', # Timer/Counter Interrupt Flag r
- 'TIFR1_ICF1': '$8', # Timer/Counter 1 Input Capture
- 'TIFR1_OCF1B': '$4', # Timer/Counter1 Output Compare
- 'TIFR1_OCF1A': '$2', # Timer/Counter1 Output Compare
- 'TIFR1_TOV1': '$1', # Timer/Counter1 Overflow Flag
- 'GTCCR' : '$43', # General Timer/Counter Control
- 'GTCCR_TSM': '$80', # Timer/Counter Synchronization
- 'GTCCR_PSRSYNC': '$1', # Prescaler Reset
-
-# Module COULOMB_COUNTER
- 'CADCSRA' : '$e4', # CC-ADC Control and Status Regi
- 'CADCSRA_CADEN': '$80', # When the CADEN bit is cleared
- 'CADCSRA_CADPOL': '$40', #
- 'CADCSRA_CADUB': '$20', # CC_ADC Update Busy
- 'CADCSRA_CADAS': '$18', # CC_ADC Accumulate Current Sele
- 'CADCSRA_CADSI': '$6', # The CADSI bits determine the c
- 'CADCSRA_CADSE': '$1', # When the CADSE bit is written
- 'CADCSRB' : '$e5', # CC-ADC Control and Status Regi
- 'CADCSRB_CADACIE': '$40', #
- 'CADCSRB_CADRCIE': '$20', # Regular Current Interrupt Enab
- 'CADCSRB_CADICIE': '$10', # CAD Instantenous Current Inter
- 'CADCSRB_CADACIF': '$4', # CC-ADC Accumulate Current Inte
- 'CADCSRB_CADRCIF': '$2', # CC-ADC Accumulate Current Inte
- 'CADCSRB_CADICIF': '$1', # CC-ADC Instantaneous Current I
- 'CADIC' : '$e8', # CC-ADC Instantaneous Current
- 'CADAC3' : '$e3', # ADC Accumulate Current
- 'CADAC2' : '$e2', # ADC Accumulate Current
- 'CADAC1' : '$e1', # ADC Accumulate Current
- 'CADAC0' : '$e0', # ADC Accumulate Current
- 'CADRC' : '$e6', # CC-ADC Regular Current
-
-# Module TIMER_COUNTER_0
- 'TCCR0A' : '$44', # Timer/Counter0 Control Registe
- 'TCCR0A_TCW0': '$80', # Timer/Counter Width
- 'TCCR0A_ICEN0': '$40', # Input Capture Mode Enable
- 'TCCR0A_ICNC0': '$20', # Input Capture Noise Canceler
- 'TCCR0A_ICES0': '$10', # Input Capture Edge Select
- 'TCCR0A_ICS0': '$8', # Input Capture Select
- 'TCCR0A_WGM00': '$1', # Clock Select0 bit 0
- 'TCCR0B' : '$45', # Timer/Counter0 Control Registe
- 'TCCR0B_CS02': '$4', # Clock Select0 bit 2
- 'TCCR0B_CS01': '$2', # Clock Select0 bit 1
- 'TCCR0B_CS00': '$1', # Clock Select0 bit 0
- 'TCNT0' : '$46', # Timer Counter 0 Bytes
- 'OCR0A' : '$48', # Output compare Register A
- 'OCR0B' : '$49', # Output compare Register B
- 'TIMSK0' : '$6e', # Timer/Counter Interrupt Mask R
- 'TIMSK0_ICIE0': '$8', # Timer/Counter n Input Capture
- 'TIMSK0_OCIE0B': '$4', # Output Compare Interrupt Enabl
- 'TIMSK0_OCIE0A': '$2', # Output Compare Interrupt Enabl
- 'TIMSK0_TOIE0': '$1', # Overflow Interrupt Enable
- 'TIFR0' : '$35', # Timer/Counter Interrupt Flag r
- 'TIFR0_ICF0': '$8', # Timer/Counter Interrupt Flag R
- 'TIFR0_OCF0B': '$4', # Output Compare Flag
- 'TIFR0_OCF0A': '$2', # Output Compare Flag
- 'TIFR0_TOV0': '$1', # Overflow Flag
-
-# Module VOLTAGE_REGULATOR
- 'ROCR' : '$c8', # Regulator Operating Condition
- 'ROCR_ROCS': '$80', # ROC Status
- 'ROCR_ROCWIF': '$2', # ROC Warning Interrupt Flag
- 'ROCR_ROCWIE': '$1', # ROC Warning Interrupt Enable
-
- '__amforth_dummy':'0'
-}