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authorDimitri Sokolyuk <demon@dim13.org>2017-06-04 12:28:46 +0200
committerDimitri Sokolyuk <demon@dim13.org>2017-06-04 12:28:46 +0200
commitf713dc900328db88e32ade374d932748153da328 (patch)
tree70d836eac6eeb3c65288866e4b8e8909b08885d8
parent17a25dd6d354a3ffe9e81fc9f827684c10f7eb7f (diff)
Test ALU
-rw-r--r--eval.go6
-rw-r--r--eval_test.go19
2 files changed, 21 insertions, 4 deletions
diff --git a/eval.go b/eval.go
index 50eb4be..3c2efda 100644
--- a/eval.go
+++ b/eval.go
@@ -70,7 +70,8 @@ func (vm *J1) eval(ins Instruction) {
vm.rsp += 1
next = uint16(v)
case ALU:
- vm.st0 = vm.newST0(v)
+ vm.dsp = uint16(int8(vm.dsp) + v.Ddir)
+ vm.rsp = uint16(int8(vm.rsp) + v.Rdir)
if v.NtoAtT {
vm.memory[vm.st0] = vm.dstack[vm.dsp]
}
@@ -80,11 +81,10 @@ func (vm *J1) eval(ins Instruction) {
if v.TtoN {
vm.dstack[vm.dsp] = vm.st0
}
- vm.dsp = uint16(int8(vm.dsp) + v.Ddir)
- vm.rsp = uint16(int8(vm.rsp) + v.Rdir)
if v.RtoPC {
next = vm.rstack[vm.rsp]
}
+ vm.st0 = vm.newST0(v)
}
vm.pc = next
fmt.Println(ins)
diff --git a/eval_test.go b/eval_test.go
index 89e957a..6584fa3 100644
--- a/eval_test.go
+++ b/eval_test.go
@@ -19,7 +19,24 @@ func TestEval(t *testing.T) {
{ins: Lit(0xfe),
begin: J1{pc: 1, st0: 0xff, dstack: [32]uint16{0xff}, dsp: 1},
end: J1{pc: 2, st0: 0xfe, dstack: [32]uint16{0xff, 0xfe}, dsp: 2}},
- // to be continued
+ {ins: ALU{Opcode: 0, TtoN: true, Ddir: 1}, // dup
+ begin: J1{pc: 1, st0: 0xaa, dstack: [32]uint16{0xbb}, dsp: 1},
+ end: J1{pc: 2, st0: 0xaa, dstack: [32]uint16{0xbb, 0xaa}, dsp: 2}},
+ {ins: ALU{Opcode: 1, TtoN: true, Ddir: 1}, // over
+ begin: J1{pc: 1, st0: 0xaa, dstack: [32]uint16{0xbb}, dsp: 1},
+ end: J1{pc: 2, st0: 0xbb, dstack: [32]uint16{0xbb, 0xaa}, dsp: 2}},
+ // TODO
+ // ALU{Opcode: 6} // invert
+ // ALU{Opcode: 2, Ddir: -1} // +
+ // ALU{Opcode: 1, TtoN: true} // swap
+ // ALU{Opcode: 0, Ddir: -1} // nip
+ // ALU{Opcode: 1, Ddir: -1} // drop
+ // ALU{Opcode: 0, RtoPC: true, Rdir: -1} // ;
+ // ALU{Opcode: 1, TtoR: true, Ddir: -1, Rdir: 1} // >r
+ // ALU{Opcode: 11, TtoN: true, TtoR: true, Ddir: 1, Rdir: -1} // r>
+ // ALU{Opcode: 11, TtoN: true, TtoR: true, Ddir: 1} // r@
+ // ALU{Opcode: 12} // @
+ // ALU{Opcode: 1, Ddir: -1} // !
}
for _, tc := range testCases {